Hsu-Chieh Lee

According to our database, Hsu-Chieh Lee authored at least 7 papers between 2010 and 2014.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2014

Obstacle-Avoiding Free-Assignment Routing for Flip-Chip Designs.

Yuan-Kai Ho, Hsu-Chieh Lee, Webber Lee, Yao-Wen Chang, Chen-Feng Chang, I-Jye Lin, Chin-Fang Shen

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014

2013

Escape Routing for Staggered-Pin-Array PCBs.

Yuan-Kai Ho, Hsu-Chieh Lee, Yao-Wen Chang

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013

Symmetrical buffered clock-tree synthesis with supply-voltage alignment.

Xin-Wei Shih, Tzu-Hsuan Hsu, Hsu-Chieh Lee, Yao-Wen Chang, Kai-Yuan Chao

Proceedings of the 18th Asia and South Pacific Design Automation Conference, 2013

2012

Obstacle-avoiding free-assignment routing for flip-chip designs.

Po-Wei Lee, Hsu-Chieh Lee, Yuan-Kai Ho, Yao-Wen Chang, Chen-Feng Chang, I-Jye Lin, Chin-Fang Shen

Proceedings of the 49th Annual Design Automation Conference 2012, 2012

A chip-package-board co-design methodology.

Hsu-Chieh Lee, Yao-Wen Chang

Proceedings of the 49th Annual Design Automation Conference 2012, 2012

2010

High variation-tolerant obstacle-avoiding clock mesh synthesis with symmetrical driving trees.

Xin-Wei Shih, Hsu-Chieh Lee, Kuan-Hsien Ho, Yao-Wen Chang

Proceedings of the 2010 International Conference on Computer-Aided Design, 2010

Recent research development in flip-chip routing.

Hsu-Chieh Lee, Yao-Wen Chang, Po-Wei Lee

Proceedings of the 2010 International Conference on Computer-Aided Design, 2010