Hua Jing

According to our database1, Hua Jing authored at least 5 papers between 2008 and 2016.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2016
Multiple-combinational-channel: A network architecture for workload balance and deadlock free.
Future Generation Comp. Syst., 2016

2014
An 8Gb/s 0.75mW/Gb/s injection-locked receiver with constant jitter tracking bandwidth and accurate quadrature clock generation in 40nm CMOS.
Proceedings of the 21st IEEE International Conference on Electronics, Circuits and Systems, 2014

2012
MCC: A Load Balancing and Deadlock Free Interconnect Network for Cache Coherent Chip Multiprocessors.
Proceedings of the 15th IEEE International Conference on Computational Science and Engineering, 2012

2011
A novel SST transmitter with mutually decoupled impedance self-calibration and equalization.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

2008
Type-2 fuzzy mathematical modeling and analysis of the dynamical behaviors of complex ecosystems.
Simulation Modelling Practice and Theory, 2008


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