Shuai Chen

According to our database1, Shuai Chen authored at least 52 papers between 2008 and 2019.

Collaborative distances:



In proceedings 
PhD thesis 




D-Map+: Interactive Visual Analysis and Exploration of Ego-centric and Event-centric Information Diffusion Patterns in Social Media.
ACM TIST, 2019

A Nano-Watt MOS-Only Voltage Reference With High-Slope PTAT Voltage Generators.
IEEE Trans. on Circuits and Systems, 2018

Adaptive Dynamic Programming-Based Multi-Sensor Scheduling for Collaborative Target Tracking in Energy Harvesting Wireless Sensor Networks.
Sensors, 2018

A MEMS IMU De-Noising Method Using Long Short Term Memory Recurrent Neural Networks (LSTM-RNN).
Sensors, 2018

Performance Analysis of a Deep Simple Recurrent Unit Recurrent Neural Network (SRU-RNN) in MEMS Gyroscope De-Noising.
Sensors, 2018

FPGA implementation of SRAM PUFs based cryptographically secure pseudo-random number generator.
Microprocessors and Microsystems - Embedded Hardware Design, 2018

A Chip-Level Anti-Reverse Engineering Technique.
JETC, 2018

OncomiR: an online resource for exploring pan-cancer microRNA dysregulation.
Bioinformatics, 2018

All-Digital Calibration of Timing Mismatch Error in Time-Interleaved Analog-to-Digital Converters.
IEEE Trans. VLSI Syst., 2017

A 23-mW Face Recognition Processor with Mostly-Read 5T Memory in 40-nm CMOS.
J. Solid-State Circuits, 2017

Incremental localisation algorithm based on distance matrix in wireless sensor networks.
IJICT, 2017

K-means clustering method based on artificial immune system in scientific research project management in universities.
IJCSM, 2017

Implementation and performance evaluation of a fast relocation method in a GPS/SINS/CSAC integrated navigation system hardware prototype.
IEICE Electronic Express, 2017

Visual Analysis for Multi-Spectral Images Comparisons.
Proceedings of the 2017 IEEE Conference on Visual Analytics Science and Technology, 2017

E-Map: A Visual Analytics Approach for Exploring Significant Event Evolutions in Social Media.
Proceedings of the 2017 IEEE Conference on Visual Analytics Science and Technology, 2017

Generalized pooling pyramid with hierarchical dictionary sparse coding for event and object recognition.
Proceedings of the 2017 IEEE International Conference on Image Processing, 2017

Associated Metric Coding Network for Pedestrian Detection.
Proceedings of the Computer Vision - Second CCF Chinese Conference, 2017

Fast implementation of image mosaicing on GPU.
Proceedings of the 10th International Congress on Image and Signal Processing, 2017

Image mosaic based on SIFT and morphological component analysis.
Proceedings of the 10th International Congress on Image and Signal Processing, 2017

A Robust Energy/Area-Efficient Forwarded-Clock Receiver With All-Digital Clock and Data Recovery in 28-nm CMOS for High-Density Interconnects.
IEEE Trans. VLSI Syst., 2016

A dynamic PUF anti-aging authentication system based on restrict race code.
SCIENCE CHINA Information Sciences, 2016

Medical image fusion using discrete fractional wavelet transform.
Biomed. Signal Proc. and Control, 2016

Reverse engineering resistant ROM design using transformable via-programming structure.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

D-Map: Visual analysis of ego-centric information diffusion patterns in social media.
Proceedings of the 2016 IEEE Conference on Visual Analytics Science and Technology, 2016

A Dynamic Reseeding DRBG Based on SRAM PUFs.
Proceedings of the International Conference on Cyber-Enabled Distributed Computing and Knowledge Discovery, 2016

Design and fabrication of ultra-wideband power amplifier based on GaN HEMT.
IEICE Electronic Express, 2015

A 23mW face recognition accelerator in 40nm CMOS with mostly-read 5T memory.
Proceedings of the Symposium on VLSI Circuits, 2015

Cryptopaper: digital information security for physical documents.
Proceedings of the 30th Annual ACM Symposium on Applied Computing, 2015

A Fault-Tolerant Java Virtual Machine Using Fast Rejuvenation for Soft-Error-Prone Systems.
Proceedings of the 17th IEEE International Conference on High Performance Computing and Communications, 2015

Chip-level anti-reverse engineering using transformable interconnects.
Proceedings of the 2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2015

Laser Gyro Temperature Compensation Using Modified RBFNN.
Sensors, 2014

A novel self-tuning proportional-integral-derivative controller based on a radial basis function network for trajectory tracking of service robots.
J. Systems & Control Engineering, 2014

Wireless sensor network positioning based on the unilateral side of two reference nodes.
Computers & Electrical Engineering, 2014

A 0.8V, 560fJ/bit, 14Gb/s injection-locked receiver with input duty-cycle distortion tolerable edge-rotating 5/4X sub-rate CDR in 65nm CMOS.
Proceedings of the Symposium on VLSI Circuits, 2014

Optimizing Memory Access with Fast Address Computation on a MIPS Architecture.
Proceedings of the 9th IEEE International Conference on Networking, 2014

An 8Gb/s 0.75mW/Gb/s injection-locked receiver with constant jitter tracking bandwidth and accurate quadrature clock generation in 40nm CMOS.
Proceedings of the 21st IEEE International Conference on Electronics, Circuits and Systems, 2014

Melody oriented interactive chaotic sound generation system using music conductor gesture.
Proceedings of the IEEE International Conference on Fuzzy Systems, 2014

Energy efficient in-memory machine learning for data intensive image-processing by non-volatile domain-wall memory.
Proceedings of the 19th Asia and South Pacific Design Automation Conference, 2014

Chaotic Music Generation System Using Music Conductor Gesture.
JACIII, 2013

Godson-3B1500: A 32nm 1.35GHz 40W 172.8GFLOPS 8-core processor.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013

Environmental Map Building and Location for Mobile Robots in Intelligent Space.
Proceedings of the Information Computing and Applications - 4th International Conference, 2013

A 1.2 pJ/b 6.4 Gb/s 8+1-lane forwarded-clock receiver with PVT-variation-tolerant all-digital clock and data recovery in 28nm CMOS.
Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, 2013

A novel small-world algorithm incorporating chaos optimization and its application to robot path planning.
J. Systems & Control Engineering, 2012

Music conductor gesture recognized interactive music generation system.
Proceedings of the 6th International Conference on Soft Computing and Intelligent Systems (SCIS), 2012

A fast-lock-in wide-range harmonic-free all-digital DLL with a complementary delay line.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

Variable Step Length Best Combination AEC Algorithm in IPC.
Proceedings of the Advances in Brain Inspired Cognitive Systems, 2012

A novel SST transmitter with mutually decoupled impedance self-calibration and equalization.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

Alpha Compression with Variable Data Formats.
Proceedings of the Eurographics 2011 - Short Papers, Llandudno, UK, April 11-15, 2011, 2011

Block Permutation Cipher in Chaos with Feistel Structure for Wireless Sensor Networks.
Proceedings of the Advances in Computer Science, 2011

A coarse-grained reconfigurable computing unit.
Proceedings of the 2011 IEEE 9th International Conference on ASIC, 2011

A permutation network for configurable and scalable FFT processors.
Proceedings of the 2011 IEEE 9th International Conference on ASIC, 2011

Chaos block cipher for wireless sensor network.
Science in China Series F: Information Sciences, 2008