Hui Chen

According to our database, Hui Chen authored at least 20 papers between 2021 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

DAG-Order: An Order-Based Dynamic DAG Scheduling for Real-Time Networks-on-Chip.

Peng Chen, Hui Chen, Weichen Liu, Linbo Long, Wanli Chang, Nan Guan

ACM Trans. Archit. Code Optim., March, 2024

2023

LightNAS: On Lightweight and Scalable Neural Architecture Search for Embedded Platforms.

Xiangzhong Luo, Di Liu, Hao Kong, Shuo Huai, Hui Chen, Weichen Liu

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., June, 2023

SurgeNAS: A Comprehensive Surgery on Hardware-Aware Differentiable Neural Architecture Search.

Xiangzhong Luo, Di Liu, Hao Kong, Shuo Huai, Hui Chen, Weichen Liu

IEEE Trans. Computers, April, 2023

FAT: An In-Memory Accelerator With Fast Addition for Ternary Weight Neural Networks.

Shien Zhu, Luan H. K. Duong, Hui Chen, Di Liu, Weichen Liu

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., March, 2023

Brief Industry Paper: Latency-Driven Optimization of Instruction Blocks Orchestration on Memory.

Hui Chen, Xiaoqiang Wu, Lei Dai, Yang Liu

Proceedings of the IEEE Real-Time Systems Symposium, 2023

Crossbar-Aligned & Integer-Only Neural Network Compression for Efficient in-Memory Acceleration.

Shuo Huai, Di Liu, Xiangzhong Luo, Hui Chen, Weichen Liu, Ravi Subramaniam

Proceedings of the 28th Asia and South Pacific Design Automation Conference, 2023

MUGNoC: A Software-Configured Multicast-Unicast-Gather NoC for Accelerating CNN Dataflows.

Hui Chen, Di Liu, Shiqing Li, Shuo Huai, Xiangzhong Luo, Weichen Liu

Proceedings of the 28th Asia and South Pacific Design Automation Conference, 2023

2022

Hardware-software co-design and optimization for point-to-point network-on-chip based many-core systems

Hui Chen

PhD thesis, 2022

Designing Efficient DNNs via Hardware-Aware Neural Architecture Search and Beyond.

Xiangzhong Luo, Di Liu, Shuo Huai, Hao Kong, Hui Chen, Weichen Liu

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

ArSMART: An Improved SMART NoC Design Supporting Arbitrary-Turn Transmission.

Hui Chen, Peng Chen, Jun Zhou, Luan H. K. Duong, Weichen Liu

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

LAMP: Load-Balanced Multipath Parallel Transmission in Point-to-Point NoCs.

Hui Chen, Peng Chen, Xiangzhong Luo, Shuo Huai, Weichen Liu

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

Contention Minimization in Emerging SMART NoC via Direct and Indirect Routes.

Peng Chen, Hui Chen, Jun Zhou, Mengquan Li, Weichen Liu, Chunhua Xiao, Yiyuan Xie, Nan Guan

IEEE Trans. Computers, 2022

EDLAB: A Benchmark for Edge Deep Learning Accelerators.

Hao Kong, Shuo Huai, Di Liu, Lei Zhang, Hui Chen, Shien Zhu, Shiqing Li, Weichen Liu, Manu Rastogi, Ravi Subramaniam, Madhu Athreya, M. Anthony Lewis

IEEE Des. Test, 2022

Latency-driven Optimization of Switching Pipeline Design in Network Chips.

Jiale Chen, Xiaoqiang Wu, Debayan Roy, Hui Chen, Ping Xiang, Wenzhuo Zhang, Yuhong Feng, Wanli Chang

Proceedings of the IEEE Real-Time Systems Symposium, 2022

You only search once: on lightweight differentiable architecture search for resource-constrained embedded platforms.

Xiangzhong Luo, Di Liu, Hao Kong, Shuo Huai, Hui Chen, Weichen Liu

Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022

Work-in-Progress: What to Expect of Early Training Statistics? An Investigation on Hardware-Aware Neural Architecture Search.

Xiangzhong Luo, Di Liu, Hao Kong, Shuo Huai, Hui Chen, Weichen Liu

Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis, 2022

2021

MARCO: A High-performance Task Mapping and Routing Co-optimization Framework for Point-to-Point NoC-based Heterogeneous Computing Systems.

Hui Chen, Zihao Zhang, Peng Chen, Xiangzhong Luo, Shiqing Li, Weichen Liu

ACM Trans. Embed. Comput. Syst., 2021

Reduced Worst-Case Communication Latency Using Single-Cycle Multihop Traversal Network-on-Chip.

Peng Chen, Weichen Liu, Hui Chen, Shiqing Li, Mengquan Li, Lei Yang, Nan Guan

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021

Partial order based non-preemptive communication scheduling towards real-time networks-on-chip.

Peng Chen, Hui Chen, Jun Zhou, Di Liu, Shiqing Li, Weichen Liu, Wanli Chang, Nan Guan

Proceedings of the SAC '21: The 36th ACM/SIGAPP Symposium on Applied Computing, 2021

Parallel Multipath Transmission for Burst Traffic Optimization in Point-to-Point NoCs.

Hui Chen, Zihao Zhang, Peng Chen, Shien Zhu, Weichen Liu

Proceedings of the GLSVLSI '21: Great Lakes Symposium on VLSI 2021, 2021