Hung-Yi Liu

According to our database1, Hung-Yi Liu authored at least 16 papers between 2006 and 2021.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
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Links

On csauthors.net:

Bibliography

2021
Online and Offline Machine Learning for Industrial Design Flow Tuning: (Invited - ICCAD Special Session Paper).
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021

2017
Developing Mobile Health Management System for Patients with Musculoskeletal Tumor.
Proceedings of the MEDINFO 2017: Precision Healthcare through Informatics, 2017

2016
Scalable Auto-Tuning of Synthesis Parameters for Optimizing High-Performance Processors.
Proceedings of the 2016 International Symposium on Low Power Electronics and Design, 2016

A Scalable Black-Box Optimization System for Auto-Tuning VLSI Synthesis Programs.
Proceedings of the 1st International Workshop on RESource Awareness and Application Auto-tuning in Adaptive and heterogeNeous compuTing co-located with 19th International Conference on Design, 2016

A synthesis-parameter tuning system for autonomous design-space exploration.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

2015
Supervised Design-Space Exploration.
PhD thesis, 2015

2013
On learning-based methods for design-space exploration with high-level synthesis.
Proceedings of the 50th Annual Design Automation Conference 2013, 2013

A method to abstract RTL IP blocks into C++ code and enable high-level synthesis.
Proceedings of the 50th Annual Design Automation Conference 2013, 2013

2012
Compositional system-level design exploration with planning of high-level synthesis.
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012

2011
Supervised design space exploration by compositional approximation of Pareto sets.
Proceedings of the 48th Design Automation Conference, 2011

2009
Voltage-Island Partitioning and Floorplanning Under Timing Constraints.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009

2008
An Efficient Graph-Based Algorithm for ESD Current Path Analysis.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008

2007
An ILP algorithm for post-floorplanning voltage-island generation considering power-network planning.
Proceedings of the 2007 International Conference on Computer-Aided Design, 2007

A Provably Good Approximation Algorithm for Power Optimization Using Multiple Supply Voltages.
Proceedings of the 44th Design Automation Conference, 2007

2006
Current path analysis for electrostatic discharge protection.
Proceedings of the 2006 International Conference on Computer-Aided Design, 2006

Voltage island aware floorplanning for power and timing optimization.
Proceedings of the 2006 International Conference on Computer-Aided Design, 2006


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