Iris Ying Chou
According to our database1,
Iris Ying Chou
authored at least 2 papers
in 2025.
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Bibliography
2025
Lincoln: Real-Time 50~100B LLM Inference on Consumer Devices with LPDDR-Interfaced, Compute-Enabled Flash Memory.
Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2025
Chameleon-SAT: An Adaptive Boolean Satisfiability Accelerator Using Mixed-Signal In-Memory Computing for Versatile SAT Problems.
Proceedings of the 62nd ACM/IEEE Design Automation Conference, 2025