Zhaoshi Li

Orcid: 0000-0003-0786-9350

According to our database1, Zhaoshi Li authored at least 16 papers between 2014 and 2022.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2022
Dynamically Reconfigurable Memory Address Mapping for General-Purpose Graphics Processing Unit.
Proceedings of the 2022 IEEE International Conference on Integrated Circuits, 2022

2021
An Elastic Task Scheduling Scheme on Coarse-Grained Reconfigurable Architectures.
IEEE Trans. Parallel Distributed Syst., 2021

ABC-DIMM: Alleviating the Bottleneck of Communication in DIMM-based Near-Memory Processing with Inter-DIMM Broadcast.
Proceedings of the 48th ACM/IEEE Annual International Symposium on Computer Architecture, 2021

HeteroKV: A Scalable Line-rate Key-Value Store on Heterogeneous CPU-FPGA Platforms.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

2020
A Survey of Coarse-Grained Reconfigurable Architecture and Design: Taxonomy, Challenges, and Applications.
ACM Comput. Surv., 2020

CATCAM: Constant-time Alteration Ternary CAM with Scalable In-Memory Architecture.
Proceedings of the 53rd Annual IEEE/ACM International Symposium on Microarchitecture, 2020

GraphABCD: Scaling Out Graph Analytics with Asynchronous Block Coordinate Descent.
Proceedings of the 47th ACM/IEEE Annual International Symposium on Computer Architecture, 2020

2019
FPGA-Accelerated Optimistic Concurrency Control for Transactional Memory.
Proceedings of the 52nd Annual IEEE/ACM International Symposium on Microarchitecture, 2019

ReDESK: A Reconfigurable Dataflow Engine for Sparse Kernels on Heterogeneous Platforms.
Proceedings of the International Conference on Computer-Aided Design, 2019

Constructing Concurrent Data Structures on FPGA with Channels.
Proceedings of the 2019 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2019

2018
HReA: An Energy-Efficient Embedded Dynamically Reconfigurable Fabric for 13-Dwarfs Processing.
IEEE Trans. Circuits Syst. II Express Briefs, 2018

Breaking the Synchronization Bottleneck with Reconfigurable Transactional Execution.
IEEE Comput. Archit. Lett., 2018

2017
Aggressive Pipelining of Irregular Applications on Reconfigurable Hardware.
Proceedings of the 44th Annual International Symposium on Computer Architecture, 2017

A static-placement, dynamic-issue framework for CGRA loop accelerator.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

Minimizing Pipeline Stalls in Distributed-Controlled Coarse-Grained Reconfigurable Arrays with Triggered Instruction Issue and Execution.
Proceedings of the 54th Annual Design Automation Conference, 2017

2014
Teach Reconfigurable Computing using mixed-grained fabrics based hardware infrastructure.
Proceedings of the IEEE Frontiers in Education Conference, 2014


  Loading...