Wenping Zhu

Orcid: 0000-0002-3276-4019

According to our database1, Wenping Zhu authored at least 27 papers between 2014 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2024
16.2 A 28nm 69.4kOPS 4.4μJ/Op Versatile Post-Quantum Crypto-Processor Across Multiple Mathematical Problems.
Proceedings of the IEEE International Solid-State Circuits Conference, 2024

2023
RePQC: A 3.4-uJ/Op 48-kOPS Post-Quantum Crypto-Processor for Multiple-Mathematical Problems.
IEEE J. Solid State Circuits, 2023

Mckeycutter: A High-throughput Key Generator of Classic McEliece on Hardware.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

2022
A Compact and High-Performance Hardware Architecture for CRYSTALS-Dilithium.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2022

BitCluster: Fine-Grained Weight Quantization for Load-Balanced Bit-Serial Neural Network Accelerators.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

A 12.1 TOPS/W Quantized Network Acceleration Processor With Effective-Weight-Based Convolution and Error-Compensation-Based Prediction.
IEEE J. Solid State Circuits, 2022

Compact GF(2) systemizer and optimized constant-time hardware sorters for Key Generation in Classic McEliece.
IACR Cryptol. ePrint Arch., 2022

A 28nm 48KOPS 3.4µJ/Op Agile Crypto-Processor for Post-Quantum Cryptography on Multi-Mathematical Problems.
Proceedings of the IEEE International Solid-State Circuits Conference, 2022

2021
A 460 GOPS/W Improved Mnemonic Descent Method-Based Hardwired Accelerator for Face Alignment.
IEEE Trans. Multim., 2021

LWRpro: An Energy-Efficient Configurable Crypto-Processor for Module-LWR.
IEEE Trans. Circuits Syst. I Regul. Pap., 2021

9.2A 28nm 12.1TOPS/W Dual-Mode CNN Processor Using Effective-Weight-Based Convolution and Error-Compensation-Based Prediction.
Proceedings of the IEEE International Solid-State Circuits Conference, 2021

2020
A Multi-Task Hardwired Accelerator for Face Detection and Alignment.
IEEE Trans. Circuits Syst. Video Technol., 2020

A High-performance Hardware Implementation of Saber Based on Karatsuba Algorithm.
IACR Cryptol. ePrint Arch., 2020

Deterministic conversion rule for CNNs to efficient spiking convolutional neural networks.
Sci. China Inf. Sci., 2020

TFE: Energy-efficient Transferred Filter-based Engine to Compress and Accelerate Convolutional Neural Networks.
Proceedings of the 53rd Annual IEEE/ACM International Symposium on Microarchitecture, 2020

2019
Face Alignment With Expression- and Pose-Based Adaptive Initialization.
IEEE Trans. Multim., 2019

A Face Alignment Accelerator Based on Optimized Coarse-to-Fine Shape Searching.
IEEE Trans. Circuits Syst. Video Technol., 2019

A Binary-Feature-Based Object Recognition Accelerator With 22 M-Vector/s Throughput and 0.68 G-Vector/J Energy-Efficiency for Full-HD Resolution.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019

A Novel Wavelet Denoising Pre-processing Algorithm for TDOA Localization.
Proceedings of the 2019 IEEE/CIC International Conference on Communications in China, 2019

A 1.17 TOPS/W, 150fps Accelerator for Multi-Face Detection and Alignment.
Proceedings of the 56th Annual Design Automation Conference 2019, 2019

L-MPC: A LUT based Multi-Level Prediction-Correction Architecture for Accelerating Binary-Weight Hourglass Network.
Proceedings of the 56th Annual Design Automation Conference 2019, 2019

2017
A 700fps Optimized Coarse-to-Fine Shape Searching Based Hardware Accelerator for Face Alignment.
Proceedings of the 54th Annual Design Automation Conference, 2017

2016
A 135-frames/s 1080p 87.5-mW Binary-Descriptor-Based Image Feature Extraction Accelerator.
IEEE Trans. Circuits Syst. Video Technol., 2016

2015
A 181 GOPS AKAZE Accelerator Employing Discrete-Time Cellular Neural Networks for Real-Time Feature Extraction.
Sensors, 2015

A 127 fps in full hd accelerator based on optimized AKAZE with efficiency and effectiveness for image feature extraction.
Proceedings of the 52nd Annual Design Automation Conference, 2015

2014
An uneven-dual-core processor based mobile platform for facilitating the collaboration among various embedded electronic devices.
IEEE Trans. Consumer Electron., 2014

A 65 nm uneven-dual-core SoC based platform for multi-device collaborative computing.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014


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