Iris Ying Chou

According to our database, Iris Ying Chou authored at least 3 papers between 2025 and 2026.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2026

SharpSAT: A Heuristic-Learning-Based SAT Accelerator Achieving 0.8μs/16.1μs Solution Time in SAT/UNSAT Cases.

Yi Huang, Hao Kong, Iris Ying Chou, Bin Wang, Xiangyu Kong, Jianfeng Zhu, Liangwei Li, Xiao Li, Hanning Wang, Aoyang Zhang, Leibo Liu

Proceedings of the IEEE International Solid-State Circuits Conference, 2026

2025

Lincoln: Real-Time 50~100B LLM Inference on Consumer Devices with LPDDR-Interfaced, Compute-Enabled Flash Memory.

Weiyi Sun, Mingyu Gao, Zhaoshi Li, Aoyang Zhang, Iris Ying Chou, Jianfeng Zhu, Shaojun Wei, Leibo Liu

Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2025

Chameleon-SAT: An Adaptive Boolean Satisfiability Accelerator Using Mixed-Signal In-Memory Computing for Versatile SAT Problems.

Iris Ying Chou, Hao Kong, Yi Huang, Jianfeng Zhu, Wenping Zhu, Shaojun Wei, Aoyang Zhang, Leibo Liu

Proceedings of the 62nd ACM/IEEE Design Automation Conference, 2025