Aoyang Zhang

Orcid: 0000-0002-3283-2165

According to our database1, Aoyang Zhang authored at least 17 papers between 2016 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2024
16.2 A 28nm 69.4kOPS 4.4μJ/Op Versatile Post-Quantum Crypto-Processor Across Multiple Mathematical Problems.
Proceedings of the IEEE International Solid-State Circuits Conference, 2024

2023
A Super-Resolution Flexible Video Coding Solution for Improving Live Streaming Quality.
IEEE Trans. Multim., 2023

A Portable CMOS-Based Spin Resonance System for High-Resolution Spectroscopy and Imaging.
IEEE J. Solid State Circuits, 2023

A Wideband CMOS NMR Spectrometer for Multinuclear Molecular Fingerprinting.
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023

Counterfactual Video Recommendation for Duration Debiasing.
Proceedings of the 29th ACM SIGKDD Conference on Knowledge Discovery and Data Mining, 2023

2022
Knowledge-based Temporal Fusion Network for Interpretable Online Video Popularity Prediction.
Proceedings of the WWW '22: The ACM Web Conference 2022, Virtual Event, Lyon, France, April 25, 2022

A Portable CMOS-based MRI System with 67×67×83 µm<sup>3</sup>Image Resolution.
Proceedings of the 48th IEEE European Solid State Circuits Conference, 2022

2021
Video Super-Resolution and Caching - An Edge-Assisted Adaptive Video Streaming Solution.
IEEE Trans. Broadcast., 2021

Higher quality live streaming under lower uplink bandwidth: an approach of super-resolution based video coding.
Proceedings of the 31st ACM Workshop on Network and Operating Systems Support for Digital Audio and Video, 2021

26.6 A 5-to-6GHz Current-Mode Subharmonic Switching Digital Power Amplifier for Enhancing Power Back-Off Efficiency.
Proceedings of the IEEE International Solid-State Circuits Conference, 2021

A 24-28 GHz Concurrent Harmonic and Subharmonic Tuning Class E/F2, 2/3 Subharmonic Switching Power Amplifier Achieving Peak/PBO Efficiency Enhancement.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2021

2019
A Watt-Level Phase-Interleaved Multi-Subharmonic Switching Digital Power Amplifier.
IEEE J. Solid State Circuits, 2019

A Subharmonic Switching Digital Power Amplifier for Power Back-Off Efficiency Enhancement.
IEEE J. Solid State Circuits, 2019

A Watt-Level Phase-Interleaved Multi-Subharmonic Switching Digital Power Amplifier Achieving 31.4% Average Drain Efficiency.
Proceedings of the IEEE International Solid- State Circuits Conference, 2019

2018
A 12-Bit 1.6, 3.2, and 6.4 GS/s 4-b/Cycle Time-Interleaved SAR ADC With Dual Reference Shifting and Interpolation.
IEEE J. Solid State Circuits, 2018

A Sub-Harmonic Switching Digital Power Amplifier with Hybrid Class-G Operation for Enhancing Power Back-off Efficiency.
Proceedings of the 2018 IEEE Symposium on VLSI Circuits, 2018

2016
A 12-bit 1.6 GS/s interleaved SAR ADC with dual reference shifting and interpolation achieving 17.8 fJ/conv-step in 65nm CMOS.
Proceedings of the 2016 IEEE Symposium on VLSI Circuits, 2016


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