Isask'har Walter

According to our database, Isask'har Walter authored at least 14 papers between 2006 and 2011.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2011

Static timing analysis for modeling QoS in networks-on-chip.

Evgeni Krimer, Isaac Keslassy, Avinoam Kolodny, Isask'har Walter, Mattan Erez

J. Parallel Distributed Comput., 2011

A Cost Effective Centralized Adaptive Routing for Networks-on-Chip.

Ran Manevich, Israel Cidon, Avinoam Kolodny, Isask'har Walter, Shmuel Wimer

Proceedings of the 14th Euromicro Conference on Digital System Design, 2011

Capacity optimized NoC for multi-mode SoC.

Isask'har Walter, Erez Kantor, Israel Cidon, Shay Kutten

Proceedings of the 48th Design Automation Conference, 2011

Latency-Constrained, Power-Optimized NoC Design for a 4G SoC: A Case Study.

Rudy Beraha, Isask'har Walter, Israel Cidon, Avinoam Kolodny

Proceedings of the Low Power Networks-on-Chip., 2011

2010

Centralized Adaptive Routing for NoCs.

Ran Manevich, Israel Cidon, Avinoam Kolodny, Isask'har Walter

IEEE Comput. Archit. Lett., 2010

Leveraging application-level requirements in the design of a NoC for a 4G SoC - a case study.

Rudy Beraha, Isask'har Walter, Israel Cidon, Avinoam Kolodny

Proceedings of the Design, Automation and Test in Europe, 2010

2009

Best of both worlds: A bus enhanced NoC (BENoC).

Ran Manevich, Isask'har Walter, Israel Cidon, Avinoam Kolodny

Proceedings of the Third International Symposium on Networks-on-Chips, 2009

Packet-level static timing analysis for NoCs.

Evgeni Krimer, Mattan Erez, Isaac Keslassy, Avinoam Kolodny, Isask'har Walter

Proceedings of the Third International Symposium on Networks-on-Chips, 2009

The design of a latency constrained, power optimized NoC for a 4G SoC.

Rudy Beraha, Isask'har Walter, Israel Cidon, Avinoam Kolodny

Proceedings of the Third International Symposium on Networks-on-Chips, 2009

The era of many-modules SoC: revisiting the NoC mapping problem.

Isask'har Walter, Israel Cidon, Avinoam Kolodny, Daniel Sigalov

Proceedings of the Second International Workshop on Network on Chip Architectures, 2009

2008

BENoC: A Bus-Enhanced Network on-Chip for a Power Efficient CMP.

Isask'har Walter, Israel Cidon, Avinoam Kolodny

IEEE Comput. Archit. Lett., 2008

2007

Network Delays and Link Capacities in Application-Specific Wormhole NoCs.

Zvika Guz, Isask'har Walter, Evgeny Bolotin, Israel Cidon, Ran Ginosar, Avinoam Kolodny

VLSI Design, 2007

Access Regulation to Hot-Modules in Wormhole NoCs.

Isask'har Walter, Israel Cidon, Ran Ginosar, Avinoam Kolodny

Proceedings of the First International Symposium on Networks-on-Chips, 2007

2006

Efficient link capacity and QoS design for network-on-chip.

Zvika Guz, Isask'har Walter, Evgeny Bolotin, Israel Cidon, Ran Ginosar, Avinoam Kolodny

Proceedings of the Conference on Design, Automation and Test in Europe, 2006