J. G. Wu

According to our database1, J. G. Wu authored at least 2 papers between 2012 and 2013.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2013
A 2Mb ReRAM with two bits error correction codes circuit for high reliability application.
Proceedings of the IEEE 10th International Conference on ASIC, 2013

2012
A 0.13µm 8Mb logic based CuxSiyO resistive memory with self-adaptive yield enhancement and operation power reduction.
Proceedings of the Symposium on VLSI Circuits, 2012


  Loading...