Jacob R. Minz

According to our database1, Jacob R. Minz authored at least 11 papers between 2004 and 2008.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2008
Buffered clock tree synthesis for 3D ICs under thermal variations.
Proceedings of the 13th Asia South Pacific Design Automation Conference, 2008

2007
Decoupling-Capacitor Planning and Sizing for Noise and Leakage Reduction.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007

2006
Multi-Objective Module Placement For 3-D System-On-Package.
IEEE Trans. Very Large Scale Integr. Syst., 2006

Block-level 3-D Global Routing With an Application to 3-D Packaging.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006

Profile-guided microarchitectural floor planning for deep submicron processor design.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006

Optical routing for 3D system-on-package.
Proceedings of the Conference on Design, Automation and Test in Europe, 2006

2005
Reliability-aware floorplanning for 3D circuits.
Proceedings of the Proceedings 2005 IEEE International SOC Conference, 2005

3D module placement for congestion and power noise reduction.
Proceedings of the 15th ACM Great Lakes Symposium on VLSI 2005, 2005

2004
Net and Pin Distribution for 3D Package Global Routing.
Proceedings of the 2004 Design, 2004

Profile-guided microarchitectural floorplanning for deep submicron processor design.
Proceedings of the 41th Design Automation Conference, 2004

Layer assignment for reliable system-on-package.
Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, 2004


  Loading...