# Cheng-Kok Koh

According to our database

Collaborative distances:

^{1}, Cheng-Kok Koh authored at least 145 papers between 1994 and 2019.Collaborative distances:

## Timeline

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## Bibliography

2019

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019

2018

Proceedings of the 23rd Asia and South Pacific Design Automation Conference, 2018

2017

Integr., 2017

Proceedings of the 2017 ACM on International Symposium on Physical Design, 2017

Proceedings of the 13th International Conference on emerging Networking EXperiments and Technologies, 2017

Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017

2016

An Automatic Design of Factors in a Human-Pose Estimation System Using Neural Networks.

IEEE Trans. Syst. Man Cybern. Syst., 2016

Construction of Reconfigurable Clock Trees for MCMM Designs Using Mode Separation and Scenario Compression.

ACM Trans. Design Autom. Electr. Syst., 2016

Proceedings of the 2016 on International Symposium on Physical Design, 2016

MCMM clock tree optimization based on slack redistribution using a reduced slack graph.

Proceedings of the 21st Asia and South Pacific Design Automation Conference, 2016

2015

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015

Rubik: Unlocking the Power of Locality and End-point Flexibility in Cloud Scale Load Balancing.

Proceedings of the 2015 USENIX Annual Technical Conference, 2015

Proceedings of the 2015 Symposium on International Symposium on Physical Design, ISPD 2015, Monterey, CA, USA, March 29, 2015

Proceedings of the 2015 IEEE/RSJ International Conference on Intelligent Robots and Systems, 2015

Proceedings of the 52nd Annual Design Automation Conference, 2015

Proceedings of the 20th Asia and South Pacific Design Automation Conference, 2015

2014

ACM Trans. Web, 2014

IEEE Trans. Syst. Man Cybern. Syst., 2014

Guest Editorial Special Section on Contemporary and Emerging Issues in Physical Design.

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014

Proceedings of the International Symposium on Physical Design, 2014

Proceedings of the 2014 IEEE International Conference on Robotics and Automation, 2014

A TSV-cross-link-based approach to 3D-clock network synthesis for improved robustness.

Proceedings of the Great Lakes Symposium on VLSI 2014, GLSVLSI '14, Houston, TX, USA - May 21, 2014

Proceedings of the Great Lakes Symposium on VLSI 2014, GLSVLSI '14, Houston, TX, USA - May 21, 2014

Proceedings of the 19th Asia and South Pacific Design Automation Conference, 2014

2013

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013

Analytical estimates of stress around a doubly periodic arrangement of through-silicon vias.

Microelectron. Reliab., 2013

On-chip caches built on multilevel spin-transfer torque RAM cells and its optimizations.

ACM J. Emerg. Technol. Comput. Syst., 2013

Proceedings of the IEEE International Conference on Robotics and Biomimetics, 2013

Case study for placement solutions in ispd11 and dac12 routability-driven placement contests.

Proceedings of the International Symposium on Physical Design, 2013

Proceedings of the International Symposium on Physical Design, 2013

Proceedings of the 2013 IEEE/RSJ International Conference on Intelligent Robots and Systems, 2013

Proceedings of the 2013 IEEE International Conference on Robotics and Automation, 2013

Proceedings of the 50th Annual Design Automation Conference 2013, 2013

2012

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2012

A Quadratic Eigenvalue Solver of Linear Complexity for 3-D Electromagnetics-Based Analysis of Large-Scale Integrated Circuits.

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2012

Guest Editorial Special Section on the 2011 International Symposium on Physical Design.

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2012

A two-dimensional domain decomposition technique for the simulation of quantum-scale devices.

J. Comput. Phys., 2012

Proceedings of the International Symposium on Physical Design, 2012

Proceedings of the International Symposium on Physical Design, 2012

A fast maze-free routing congestion estimator with hybrid unilateral monotonic routing.

Proceedings of the 2012 IEEE/ACM International Conference on Computer-Aided Design, 2012

2011

ACM Trans. Design Autom. Electr. Syst., 2011

Finite difference schemes for heat conduction analysis in integrated circuit design and manufacturing.

Int. J. Circuit Theory Appl., 2011

Cross link insertion for improving tolerance to variations in clock network synthesis.

Proceedings of the 2011 International Symposium on Physical Design, 2011

Proceedings of the 2011 International Symposium on Physical Design, 2011

Proceedings of the 2011 International Symposium on Low Power Electronics and Design, 2011

Simultaneous redundant via insertion and line end extension for yield optimization.

Proceedings of the 16th Asia South Pacific Design Automation Conference, 2011

2010

IEEE Trans. Very Large Scale Integr. Syst., 2010

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2010

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2010

Proceedings of the 2010 IEEE/WIC/ACM International Conference on Web Intelligence, 2010

PEDS: Passivity enforcement for descriptor systems via Hamiltonian-symplectic matrix pencil perturbation.

Proceedings of the 2010 International Conference on Computer-Aided Design, 2010

2009

Gated Decap: Gate Leakage Control of On-Chip Decoupling Capacitors in Scaled Technologies.

IEEE Trans. Very Large Scale Integr. Syst., 2009

ACM Trans. Archit. Code Optim., 2009

The salvage cache: A fault-tolerant cache architecture for next-generation memory technologies.

Proceedings of the 27th International Conference on Computer Design, 2009

Proceedings of the 2009 International Conference on Computer-Aided Design, 2009

A direct integral-equation solver of linear complexity for large-scale 3D capacitance and impedance extraction.

Proceedings of the 46th Design Automation Conference, 2009

2008

Proceedings of the Handbook of Algorithms for Physical Design Automation., 2008

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008

Proceedings of the 2008 International Symposium on Physical Design, 2008

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

Proceedings of the 2008 International Conference on Computer-Aided Design, 2008

2007

IEEE Trans. Very Large Scale Integr. Syst., 2007

Corrections to "Exact and Numerically Stable Closed-Form Expressions for Potential Coefficients of Rectangular Conductors".

IEEE Trans. Circuits Syst. II Express Briefs, 2007

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007

Proceedings of the 8th International Symposium on Quality of Electronic Design (ISQED 2007), 2007

Recursive Function Smoothing of Half-Perimeter Wirelength for Analytical Placement.

Proceedings of the 8th International Symposium on Quality of Electronic Design (ISQED 2007), 2007

Efficient Analysis of Large-Scale Power Grids Based on a Compact Cholesky Factorization.

Proceedings of the 8th International Symposium on Quality of Electronic Design (ISQED 2007), 2007

Variable-latency adder (VL-adder): new arithmetic circuit design practice to overcome NBTI.

Proceedings of the 2007 International Symposium on Low Power Electronics and Design, 2007

Proceedings of the 25th International Conference on Computer Design, 2007

Proceedings of the 2007 International Conference on Computer-Aided Design, 2007

Proceedings of the 2007 International Conference on Computer-Aided Design, 2007

2006

ACM Trans. Design Autom. Electr. Syst., 2006

Exact and numerically stable closed-form expressions for potential coefficients of rectangular conductors.

IEEE Trans. Circuits Syst. II Express Briefs, 2006

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006

Proceedings of the 2006 International Conference on Computer-Aided Design, 2006

Clock Generation and Distribution Using Traveling-Wave Oscillators with Reflection and Regeneration.

Proceedings of the IEEE 2006 Custom Integrated Circuits Conference, 2006

Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, 2006

SAVS: a self-adaptive variable supply-voltage technique for process- tolerant and power-efficient multi-issue superscalar processor design.

Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, 2006

SASIMI: sparsity-aware simulation of interconnect-dominated circuits with non-linear devices.

Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, 2006

2005

Current demand balancing: a technique for minimization of current surge in high performance clock-gated microprocessors.

IEEE Trans. Very Large Scale Integr. Syst., 2005

ACM Trans. Design Autom. Electr. Syst., 2005

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2005

Cascaded carry-select adder (C<sup>2</sup>SA): a new structure for low-power CSA design.

Proceedings of the 2005 International Symposium on Low Power Electronics and Design, 2005

Proceedings of the 2005 International Conference on Computer-Aided Design, 2005

Proceedings of the 15th ACM Great Lakes Symposium on VLSI 2005, 2005

Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005

Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005

Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005

Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005

Post-layout logic duplication for synthesis of domino circuits with complex gates.

Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005

Proceedings of the Fifth International Conference on Computer and Information Technology (CIT 2005), 2005

2004

Proceedings of the 2004 International Symposium on Physical Design, 2004

Proceedings of the 2004 International Conference on Computer-Aided Design, 2004

A fast Newton/Smith algorithm for solving algebraic Riccati equations and its application in model order reduction.

Proceedings of the 2004 IEEE International Conference on Acoustics, 2004

Passivity-preserving model reduction via a computationally efficient project-and-balance scheme.

Proceedings of the 41th Design Automation Conference, 2004

Proceedings of the 41th Design Automation Conference, 2004

Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, 2004

Priority assignment optimization for minimization of current surge in high performance power efficient clock-gated microprocessor.

Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, 2004

2003

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2003

Clock Scheduling for Power Supply Noise Suppression using Genetic Algorithm with Selective Gene Therapy.

Proceedings of the 4th International Symposium on Quality of Electronic Design (ISQED 2003), 2003

Integrated architectural/physical planning approach for minimization of current surge in high performance clock-gated microprocessors.

Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003

Proceedings of the 21st International Conference on Computer Design (ICCD 2003), 2003

Performance Optimization of Latency Insensitive Systems Through Buffer Queue Sizing of Communication Channels.

Proceedings of the 2003 International Conference on Computer-Aided Design, 2003

Proceedings of the 2003 International Conference on Computer-Aided Design, 2003

Proceedings of the 2003 Design, 2003

Proceedings of the 40th Design Automation Conference, 2003

Proceedings of the 2003 Asia and South Pacific Design Automation Conference, 2003

Proceedings of the 2003 Asia and South Pacific Design Automation Conference, 2003

2002

ACM Trans. Design Autom. Electr. Syst., 2002

Decoupling capacitance allocation and its application topower-supply noise-aware floorplanning.

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2002

Proceedings of the ASPDAC 2002 / VLSI Design 2002, 2002

Efficient Approximate Balanced Truncation of General Large-Scale RLC Systems via Krylov Methods.

Proceedings of the ASPDAC 2002 / VLSI Design 2002, 2002

Proceedings of the 3rd International Symposium on Quality of Electronic Design, 2002

Proceedings of the 3rd International Symposium on Quality of Electronic Design, 2002

Exact Closed Form Formula for Partial Mutual Inductances of On-Chip Interconnects.

Proceedings of the 20th International Conference on Computer Design (ICCD 2002), 2002

Proceedings of the 2002 Design, 2002

Proceedings of the 2002 Design, 2002

A factorization-based framework for passivity-preserving model reduction of RLC systems.

Proceedings of the 39th Design Automation Conference, 2002

2001

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2001

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2001

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2001

Power Trends and Performance Characterization of 3-Dimensional Integration for Future Technology Generations.

Proceedings of the 2nd International Symposium on Quality of Electronic Design (ISQED 2001), 2001

Proceedings of the 2001 International Symposium on Physical Design, 2001

Selectively clocked skewed logic (SCSL): low-power logic style for high-performance applications.

Proceedings of the 2001 International Symposium on Low Power Electronics and Design, 2001

Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

Proceedings of the Conference on Design, Automation and Test in Europe, 2001

Exploring SOI Device Structures and Interconnect Architectures for 3-Dimensional Integration.

Proceedings of the 38th Design Automation Conference, 2001

2000

Routability-driven repeater block planning for interconnect-centric floorplanning.

Proceedings of the 2000 International Symposium on Physical Design, 2000

Estimation of Inductive and Resistive Switching Noise on Power Supply Network in Deep Sub-Micron CMOS Circuits.

Proceedings of the IEEE International Conference On Computer Design: VLSI In Computers & Processors, 2000

Proceedings of the IEEE International Conference On Computer Design: VLSI In Computers & Processors, 2000

Proceedings of the 2000 IEEE/ACM International Conference on Computer-Aided Design, 2000

Proceedings of the 2000 IEEE/ACM International Conference on Computer-Aided Design, 2000

Proceedings of the 2000 IEEE/ACM International Conference on Computer-Aided Design, 2000

Proceedings of the 10th ACM Great Lakes Symposium on VLSI 2000, 2000

1998

ACM Trans. Design Autom. Electr. Syst., 1998

1997

Proceedings of the 1997 IEEE/ACM International Conference on Computer-Aided Design, 1997

Proceedings of the 1997 IEEE/ACM International Conference on Computer-Aided Design, 1997

Global interconnect sizing and spacing with consideration of coupling capacitance.

Proceedings of the 1997 IEEE/ACM International Conference on Computer-Aided Design, 1997

1996

Integr., 1996

Proceedings of the 1996 International Symposium on Low Power Electronics and Design, 1996

1995

Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995

Proceedings of the 1995 IEEE/ACM International Conference on Computer-Aided Design, 1995

1994

IEEE Trans. Very Large Scale Integr. Syst., 1994