Jae-Geun Lim

According to our database, Jae-Geun Lim authored at least 6 papers between 2021 and 2025.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of five.

2025

A Two-Step ADC with a Separate DAC Method for Enhanced Sub-Quantizer Settling Condition.

Jae-Geun Lim, Jun-Ho Boo, Hyoung-Jung Kim, Jae-Hyuk Lee, Kang-Il Cho, Gil-Cho Ahn

Proceedings of the International Conference on Electronics, Information, and Communication, 2025

2024

A CMOS Analog Front-End for Hall Sensor Readout IC.

Kang-Il Cho, Jun-Ho Boo, Jae-Geun Lim, Gil-Cho Ahn

Proceedings of the International Conference on Electronics, Information, and Communication, 2024

2023

A Second-Order DT Delta-Sigma Modulator with Noise-Shaping SAR Quantizer.

Seong-Bo Park, Jun-Ho Boo, Jae-Geun Lim, Hyoung-Jung Kim, Jae-Hyuk Lee, Won-Jun Cho, Gil-Cho Ahn

Proceedings of the 20th International SoC Design Conference, 2023

A 12-bit 3-MS/s Synchronous SAR ADC With a Hybrid RC DAC.

Mi-Ji Go, Jun-Ho Boo, Jae-Geun Lim, Hyoung-Jung Kim, Jae-Hyuk Lee, Seong-Bo Park, Byeongho Yu, Won-Jun Cho, Gil-Cho Ahn

Proceedings of the 20th International SoC Design Conference, 2023

2022

A 430-MS/s 7-b Asynchronous SAR ADC With a 40 fF Input Sampling Capacitor.

Hyoung-Jung Kim, Jae-Hyuk Lee, Jae-Geun Lim, Jun-Ho Boo, Ho-Jin Kim, Seong-Bo Park, Youngdon Choi, Jung-Hwan Choi, Gil-Cho Ahn

Proceedings of the 19th International SoC Design Conference, 2022

2021

A Single-Trim Switched Capacitor CMOS Bandgap Reference With a 3σ Inaccuracy of +0.02%, -0.12% for Battery-Monitoring Applications.

Jun-Ho Boo, Kang-Il Cho, Ho-Jin Kim, Jae-Geun Lim, Yong-Sik Kwak, Seung-Hoon Lee, Gil-Cho Ahn

IEEE J. Solid State Circuits, 2021