Gil-Cho Ahn
Orcid: 0000-0003-2827-7899
According to our database1,
Gil-Cho Ahn
authored at least 43 papers
between 1996 and 2024.
Collaborative distances:
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Bibliography
2024
Proceedings of the International Conference on Electronics, Information, and Communication, 2024
2023
A Single-Loop Third-Order 10-MHz BW Source-Follower-Integrator Based Discrete-Time Delta-Sigma ADC.
IEEE Trans. Circuits Syst. II Express Briefs, February, 2023
Proceedings of the 20th International SoC Design Conference, 2023
Proceedings of the 20th International SoC Design Conference, 2023
2022
Proceedings of the 19th International SoC Design Conference, 2022
2021
A 96dB Dynamic Range 2kHz Bandwidth 2nd Order Delta-Sigma Modulator Using Modified Feed-Forward Architecture With Delayed Feedback.
IEEE Trans. Circuits Syst. II Express Briefs, 2021
A Single-Trim Switched Capacitor CMOS Bandgap Reference With a 3σ Inaccuracy of +0.02%, -0.12% for Battery-Monitoring Applications.
IEEE J. Solid State Circuits, 2021
A 0.9V 0.022mm<sup>2</sup> 103dB DR Switched-Capacitor Audio Delta-Sigma Modulator Using Input-Referred kT/C Noise Reduction Technique.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2021
2020
Proceedings of the International SoC Design Conference, 2020
A 2.2mW 12-bit 200MS/s 28nm CMOS Pipelined SAR ADC with Dynamic Register-Based High-Speed SAR Logic.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2020
A 10-b 900-MS/s Single-Channel Pipelined-SAR ADC Using Current-Mode Reference Scaling.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2020
2019
A 12.1 fJ/Conv.-Step 12b 140 MS/s 28-nm CMOS Pipelined SAR ADC Based on Energy-Efficient Switching and Shared Ring Amplifier.
IEEE Trans. Circuits Syst. II Express Briefs, 2019
A 101 dB Dynamic Range Delta-Sigma Modulator Using Modified Feed-Forward Architecture for Audio Application.
Proceedings of the 2019 International SoC Design Conference, 2019
A 10-b 320-MS/s Dual-Residue Pipelined SAR ADC with Binary Search Current Interpolator.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2019
2018
Area-Efficient Time-Shared Digital-to-Analog Converter With Dual Sampling for AMOLED Column Driver IC's.
IEEE Trans. Circuits Syst. I Regul. Pap., 2018
A 72.9-dB SNDR 20-MHz BW 2-2 Discrete-Time Resolution-Enhanced Sturdy MASH Delta-Sigma Modulator Using Source-Follower-Based Integrators.
IEEE J. Solid State Circuits, 2018
IEICE Electron. Express, 2018
A 101 dB dynamic range, 2 kHz bandwidth delta-sigma modulator with a modified feed-forward architecture.
IEICE Electron. Express, 2018
2017
A 1.8 V 89.2 dB dynamic range delta-sigma modulator using an op-amp dynamic current biasing technique.
IEICE Electron. Express, 2017
Proceedings of the International SoC Design Conference, 2017
A 72.9-dB SNDR 20-MHz BW 2-2 discrete-time sturdy MASH delta-sigma modulator using source-follower-based integrators.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2017
2014
Proceedings of the 2014 IEEE Asia Pacific Conference on Circuits and Systems, 2014
2013
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013
2012
Proceedings of the International SoC Design Conference, 2012
Proceedings of the International SoC Design Conference, 2012
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012
Proceedings of the 19th IEEE International Conference on Electronics, Circuits and Systems, 2012
2011
A 10-bit 100-MS/s Dual-Channel Pipelined ADC Using Dynamic Memory Effect Cancellation Technique.
IEEE Trans. Circuits Syst. II Express Briefs, 2011
A 14b 150 MS/s 140 mW 2.0 mm<sup>2</sup> 0.13µm CMOS A/D converter for software-defined radio systems.
Int. J. Circuit Theory Appl., 2011
A Single Amplifier-Based 12-bit 100 MS/s 1 V 19 mW 0.13 µm CMOS ADC with Various Power and Area Minimized Circuit Techniques.
IEICE Trans. Electron., 2011
Proceedings of the International SoC Design Conference, 2011
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011
2010
A 12 bit 50 MS/s CMOS Nyquist A/D Converter With a Fully Differential Class-AB Switched Op-Amp.
IEEE J. Solid State Circuits, 2010
Proceedings of the IEEE International Solid-State Circuits Conference, 2010
2009
A 1.2-V 12-b 120-MS/s SHA-Free Dual-Channel Nyquist ADC Based on Midcode Calibration.
IEEE Trans. Circuits Syst. I Regul. Pap., 2009
Proceedings of the IEEE Custom Integrated Circuits Conference, 2009
2008
IEEE J. Solid State Circuits, 2008
2007
Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, 2007
2005
Sub-1-V design techniques for high-linearity multistage/pipelined analog-to-digital converters.
IEEE Trans. Circuits Syst. I Regul. Pap., 2005
IEEE J. Solid State Circuits, 2005
IEEE J. Solid State Circuits, 2005
2004
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004
1996