James T. Kao

According to our database1, James T. Kao authored at least 10 papers between 1997 and 2008.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
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Links

On csauthors.net:

Bibliography

2008
A DDFS Driven Mixing-DAC with Image and Harmonic Rejection Capabilities.
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

2007
A Fully Integrated 0.13 µm CMOS Low-IF DBS Satellite Tuner Using Automatic Signal-Path Gain and Bandwidth Calibration.
IEEE J. Solid State Circuits, 2007

A Fully Integrated 0.13-µm CMOS Digital Low-IF DBS Satellite Tuner Using a Ring Oscillator-Based Frequency Synthesizer.
IEEE J. Solid State Circuits, 2007

2002
Adaptive body bias for reducing impacts of die-to-die and within-die parameter variations on microprocessor frequency and leakage.
IEEE J. Solid State Circuits, 2002

A 175-MV multiply-accumulate unit using an adaptive supply voltage and body bias architecture.
IEEE J. Solid State Circuits, 2002

Subthreshold leakage modeling and reduction techniques.
Proceedings of the 2002 IEEE/ACM International Conference on Computer-aided Design, 2002

2001
Subthreshold leakage control techniques for low power digital circuits.
PhD thesis, 2001

2000
Dual-threshold voltage techniques for low-power digital circuits.
IEEE J. Solid State Circuits, 2000

1998
MTCMOS Hierarchical Sizing Based on Mutual Exclusive Discharge Patterns.
Proceedings of the 35th Conference on Design Automation, 1998

1997
Transistor Sizing Issues and Tool For Multi-Threshold CMOS Technology.
Proceedings of the 34st Conference on Design Automation, 1997


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