Jan Otterstedt

According to our database1, Jan Otterstedt authored at least 8 papers between 1998 and 2022.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

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Bibliography

2022
Endurance of 2 Mbit Based BEOL Integrated ReRAM.
IEEE Access, 2022

Reliability of 28nm embedded RRAM for consumer and industrial products.
Proceedings of the IEEE International Memory Workshop, 2022

2013
Time-differential sense amplifier for sub-80mV bitline voltage embedded STT-MRAM in 40nm CMOS.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013

1998
A MIMD-based video signal processing architecture suitable for large area integration and a 16.6-cm<sup>2</sup> monolithic implementation.
IEEE Trans. Very Large Scale Integr. Syst., 1998

Signal Integrity Problems in Deep Submicron Arising from Interconnects between Cores.
Proceedings of the 16th IEEE VLSI Test Symposium (VTS '98), 28 April, 1998

Detection of CMOS address decoder open faults with March and pseudo random memory tests.
Proceedings of the Proceedings IEEE International Test Conference 1998, 1998

Core Interconnect Testing Hazards.
Proceedings of the 1998 Design, 1998

A Video Signal Processor for MIMD Multiprocessing.
Proceedings of the 35th Conference on Design Automation, 1998


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