Rainer Waser

Orcid: 0000-0002-9080-8980

According to our database1, Rainer Waser authored at least 49 papers between 2006 and 2024.

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Bibliography

2024
Experimental Validation of Memristor-Aided Logic Using 1T1R TaOx RRAM Crossbar Array.
Proceedings of the 37th International Conference on VLSI Design and 23rd International Conference on Embedded Systems, 2024

2023
Ternary Łukasiewicz logic using memristive devices.
Neuromorph. Comput. Eng., December, 2023

Sequence learning in a spiking neuronal network with memristive synapses.
Neuromorph. Comput. Eng., September, 2023

System model of neuromorphic sequence learning on a memristive crossbar array.
Neuromorph. Comput. Eng., June, 2023

Bit slicing approaches for variability aware ReRAM CIM macros.
it Inf. Technol., May, 2023

Devices and Architectures for Efficient Computing In-Memory (CIM) Design.
Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2023

Demonstration of neuromorphic sequence learning on a memristive array.
Proceedings of the Neuro-Inspired Computational Elements Conference, 2023

Exploring Multi-Valued Logic and its Application in Emerging Post-CMOS Technologies.
Proceedings of the 18th ACM International Symposium on Nanoscale Architectures, 2023

Advanced Electrical Characterization of Memristive Arrays for Neuromorphic Applications.
Proceedings of the IEEE International Conference on Metrology for eXtended Reality, 2023

Controllability of Relaxation Behavior in Ag-based Diffusive Memristors.
Proceedings of the Device Research Conference, 2023

2022
Reliability aspects of binary vector-matrix-multiplications using ReRAM devices.
Neuromorph. Comput. Eng., 2022

A High Throughput Generative Vector Autoregression Model for Stochastic Synapses.
CoRR, 2022

Endurance of 2 Mbit Based BEOL Integrated ReRAM.
IEEE Access, 2022

A failure analysis framework of ReRAM In-Memory Logic operations.
Proceedings of the IEEE International Test Conference in Asia, 2022

Experimental and Theoretical Analysis of Stateful Logic in Passive and Active Crossbar Arrays for Computation-in-Memory.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

Analysis of VMM Operations on 1S1R Crossbar Arrays and the Influence of Wire Resistances.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022


2021
Tuning the Memory Window of TaOx ReRAM Using the RF Sputtering Power.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

50x Endurance Improvement in TaOx RRAM by Extrinsic Doping.
Proceedings of the IEEE International Memory Workshop, 2021

An Ag/HfO2/Pt Threshold Switching Device with an Ultra-Low Leakage ( 1011), and Low Threshold Voltage (< 0.2 V) for Energy-Efficient Neuromorphic Computing.
Proceedings of the IEEE International Memory Workshop, 2021

2020
Variability-Aware Modeling of Filamentary Oxide-Based Bipolar Resistive Switching Cells Using SPICE Level Compact Models.
IEEE Trans. Circuits Syst., 2020

In-Memory Binary Vector-Matrix Multiplication Based on Complementary Resistive Switches.
Adv. Intell. Syst., 2020

A Mott Insulator-Based Oscillator Circuit for Reservoir Computing.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

A Compact Model for the Electroforming Process of Memristive Devices.
Proceedings of the European Conference on Circuit Theory and Design, 2020

2019
Constraints on sequence processing speed in biological neuronal networks.
Proceedings of the International Conference on Neuromorphic Systems, 2019

2018
The influence of interfacial (sub)oxide layers on the properties of pristine resistive switching devices.
Proceedings of the Non-Volatile Memory Technology Symposium, 2018

Atomistic Investigation of the Schottky Contact Conductance Limits at SrTiO3 based Resistive Switching Devices.
Proceedings of the Non-Volatile Memory Technology Symposium, 2018

2017
On the origin of the fading memory effect in ReRAMs.
Proceedings of the 27th International Symposium on Power and Timing Modeling, 2017

Thermal effects on the I-V characteristics of filamentary VCM based ReRAM-cells using a nanometer-sized heater.
Proceedings of the 17th Non-Volatile Memory Technology Symposium, 2017

2016
Memristive Sorting Networks Enabled by Electrochemical Metallization Cells.
Int. J. Unconv. Comput., 2016

Lowering forming voltage and forming-free behavior of Ta2O5 ReRAM devices.
Proceedings of the 46th European Solid-State Device Research Conference, 2016

Energy dissipation during pulsed switching of strontium-titanate based resistive switching memory devices.
Proceedings of the 46th European Solid-State Device Research Conference, 2016

The Programmable Logic-in-Memory (PLiM) computer.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

2015
Phase-Change and Redox-Based Resistive Switching Memories.
Proc. IEEE, 2015

A Complementary Resistive Switch-Based Crossbar Array Adder.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2015

Study of Memristive Associative Capacitive Networks for CAM Applications.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2015

In-memory adder functionality in 1S1R arrays.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

Controllability of multi-level states in memristive device models using a transistor as current compliance during SET operation.
Proceedings of the 2015 International Joint Conference on Neural Networks, 2015

2014
Applicability of Well-Established Memristive Models for Simulations of Resistive Switching Devices.
IEEE Trans. Circuits Syst. I Regul. Pap., 2014

Simulation and comparison of two sequential logic-in-memory approaches using a dynamic electrochemical metallization cell model.
Microelectron. J., 2014

Simulation of TaOx-based complementary resistive switches by a physics-based memristive model.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

Live demonstration: An associative capacitive network based on nanoscale complementary resistive switches.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

2013
Weibull analysis of the kinetics of resistive switches based on tantalum oxide thin films.
Proceedings of the European Solid-State Device Research Conference, 2013

2012
Memristors: Devices, Models, and Applications [Scanning the Issue].
Proc. IEEE, 2012

Scaling Potential of Local Redox Processes in Memristive SrTiO<sub>3</sub> Thin-Film Devices.
Proc. IEEE, 2012

Recent progress in redox-based resistive switching.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

2010
Memory Devices: Energy-Space-Time Tradeoffs.
Proc. IEEE, 2010

2009
Function by defects at the atomic scale - new concepts for non-volatile memories.
Proceedings of the 35th European Solid-State Circuits Conference, 2009

2006
Metallic nanogaps with access windows for liquid based systems.
Microelectron. J., 2006


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