Jean-Marc Masgonty

According to our database1, Jean-Marc Masgonty authored at least 11 papers between 1995 and 2009.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2009
Low-Power 32-bit Dual-MAC 120 µW/MHz 1.0 V icyflex1 DSP/MCU Core.
IEEE J. Solid State Circuits, 2009

2008
Low-Power Heterogeneous Systems-on-Chips.
J. Low Power Electron., 2008

Low-power 32-bit dual-MAC 120 μW/MHz 1.0 V icyflex DSP/MCU core.
Proceedings of the ESSCIRC 2008, 2008

2005
Locally switched and limited source-body bias and other leakage reduction techniques for a low-power embedded SRAM.
IEEE Trans. Circuits Syst. II Express Briefs, 2005

2004
Noise Margin in Low Power SRAM Cells.
Proceedings of the Integrated Circuit and System Design, 2004

2003
Stand-by Power Reduction for Storage Circuits.
Proceedings of the Integrated Circuit and System Design, 2003

2001
Low-power low-voltage library cells and memories.
Proceedings of the 2001 8th IEEE International Conference on Electronics, 2001

2000
Double-Latch Clocking Scheme for Low-Power I.P. Cores.
Proceedings of the Integrated Circuit Design, 2000

1997
Low-power design of 8-b embedded CoolRisc microcontroller cores.
IEEE J. Solid State Circuits, 1997

1996
Low-Power Embedded Microprocessor Design.
Proceedings of the 22rd EUROMICRO Conference '96, 1996

1995
Logic design for low-voltage/low-power CMOS circuits.
Proceedings of the 1995 International Symposium on Low Power Design 1995, 1995


  Loading...