Marc-Nicolas Morgan

According to our database1, Marc-Nicolas Morgan authored at least 7 papers between 2008 and 2016.

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Bibliography

2016
Sub-threshold latch-based icyflex2 32-bit processor with wide supply range operation.
Proceedings of the ESSCIRC Conference 2016: 42<sup>nd</sup> European Solid-State Circuits Conference, 2016

2013
Ultra low-power standard cell design using planar bulk CMOS in subthreshold operation.
Proceedings of the 2013 23rd International Workshop on Power and Timing Modeling, 2013

2012
Towards future adaptive multiprocessor systems-on-chip: An innovative approach for flexible architectures.
Proceedings of the 2012 International Conference on Embedded Computer Systems: Architectures, 2012

Fixed origin corner square inspection layout regularity metric.
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012

2010
A 1V RF SoC with an 863-to-928MHz 400kb/s radio and a 32b Dual-MAC DSP core for Wireless Sensor and Body Networks.
Proceedings of the IEEE International Solid-State Circuits Conference, 2010

2009
Low-Power 32-bit Dual-MAC 120 µW/MHz 1.0 V icyflex1 DSP/MCU Core.
IEEE J. Solid State Circuits, 2009

2008
Low-Power Heterogeneous Systems-on-Chips.
J. Low Power Electron., 2008


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