Vincent von Kaenel

According to our database1, Vincent von Kaenel authored at least 7 papers between 1995 and 2007.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2007

Dual True Random Number Generators for Cryptographic Applications Embedded on a 200 Million Device Dual CPU SoC.
Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, 2007

Power-Efficient Dual-Supply 64kB L1 Caches in a 65nm CMOS Technology.
Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, 2007

2003
A 2× load/store pipe for a low-power 1-GHz embedded processor.
IEEE J. Solid State Circuits, 2003

1997
A 2.1-MHz crystal oscillator time base with a current consumption under 500 nA.
IEEE J. Solid State Circuits, 1997

1996
A 320 MHz, 1.5 mW@1.35 V CMOS PLL for microprocessor clock generation.
IEEE J. Solid State Circuits, 1996

1995
Logic design for low-voltage/low-power CMOS circuits.
Proceedings of the 1995 International Symposium on Low Power Design 1995, 1995


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