Jens Huthmann

According to our database, Jens Huthmann authored at least 15 papers between 2010 and 2020.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2020

White Paper from Workshop on Large-scale Parallel Numerical Computing Technology (LSPANC 2020): HPC and Computer Arithmetic toward Minimal-Precision Computing.

Roman Iakymchuk, Daichi Mukunoki, Artur Podobas, Fabienne Jézéquel, Toshiyuki Imamura, Norihisa Fujita, Jens Huthmann, Shuhei Kudo, Yiyu Tan, Jens Domke, Kai Torben Ohlhus, Takeshi Fukaya, Takeo Hoshi, Yuki Murakami, Maho Nakata, Takeshi Ogita, Kentaro Sano, Taisuke Boku

CoRR, 2020

OpenMP Device Offloading to FPGAs Using the Nymble Infrastructure.

Jens Huthmann, Lukas Sommer, Artur Podobas, Andreas Koch, Kentaro Sano

Proceedings of the OpenMP: Portable Multi-Level Parallelism on Modern Systems, 2020

Extending High-Level Synthesis with High-Performance Computing Performance Visualization.

Jens Huthmann, Artur Podobas, Lukas Sommer, Andreas Koch, Kentaro Sano

Proceedings of the IEEE International Conference on Cluster Computing, 2020

2019

Scaling Performance for N-Body Stream Computation with a Ring of FPGAs.

Jens Huthmann, Shin Abiko, Artur Podobas, Kentaro Sano, Hiroyuki Takizawa

Proceedings of the 10th International Symposium on Highly-Efficient Accelerators and Reconfigurable Technologies, 2019

2017

An Execution Model and High-Level-Synthesis System for Generating SIMT Multi-Threaded Hardware from C Source Code.

Jens Huthmann

PhD thesis, 2017

2015

Optimized high-level synthesis of SMT multi-threaded hardware accelerators.

Jens Huthmann, Andreas Koch

Proceedings of the 2015 International Conference on Field Programmable Technology, 2015

2014

Automatic high-level synthesis of multi-threaded hardware accelerators.

Jens Huthmann, Julian Oppermann, Andreas Koch

Proceedings of the 24th International Conference on Field Programmable Logic and Applications, 2014

2013

Hardware/software co-compilation with the Nymble system.

Jens Huthmann, Björn Liebig, Julian Oppermann, Andreas Koch

Proceedings of the 2013 8th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC), 2013

Architecture Exploration of High-Performance Floating-Point Fused Multiply-Add Units and their Automatic Use in High-Level Synthesis.

Björn Liebig, Jens Huthmann, Andreas Koch

Proceedings of the 2013 IEEE International Symposium on Parallel & Distributed Processing, 2013

2012

Memory Latency Hiding by Load Value Speculation for Reconfigurable Computers.

Benjamin Thielmann, Jens Huthmann, Andreas Koch

ACM Trans. Reconfigurable Technol. Syst., 2012

2011

Evaluation of speculative execution techniques for high-level language to hardware compilation.

Benjamin Thielmann, Jens Huthmann, Andreas Koch

Proceedings of the 6th International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2011

RAP: More Efficient Memory Access in Highly Speculative Execution on Reconfigurable Adaptive Computers.

Benjamin Thielmann, Thorsten Wink, Jens Huthmann, Andreas Koch

Proceedings of the 2011 International Conference on Reconfigurable Computing and FPGAs, 2011

Precore - A Token-Based Speculation Architecture for High-Level Language to Hardware Compilation.

Benjamin Thielmann, Jens Huthmann, Andreas Koch

Proceedings of the International Conference on Field Programmable Logic and Applications, 2011

2010

Accelerating high-level engineering computations by automatic compilation of Geometric Algebra to hardware accelerators.

Jens Huthmann, Peter Müller, Florian Stock, Dietmar Hildenbrand, Andreas Koch

Proceedings of the 2010 International Conference on Embedded Computer Systems: Architectures, 2010

Compiling Geometric Algebra Computations into Reconfigurable Hardware Accelerators.

Jens Huthmann, Peter Müller, Florian Stock, Dietmar Hildenbrand, Andreas Koch

Proceedings of the Dynamically Reconfigurable Architectures, 11.07. - 16.07.2010, 2010