Jhih-Yu Jiang

According to our database1, Jhih-Yu Jiang authored at least 2 papers between 2013 and 2015.

Collaborative distances:
  • Dijkstra number2 of six.
  • Erdős number3 of five.

Timeline

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2015
4×25 Gb/s Transceiver With Optical Front-end for 100 GbE System in 65 nm CMOS Technology.
IEEE J. Solid State Circuits, 2015

2013
100Gb/s ethernet chipsets in 65nm CMOS technology.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013


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