Jiing-Yuan Lin

According to our database, Jiing-Yuan Lin authored at least 10 papers between 1994 and 2008.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2008

Experiences of low power design implementation and verification.

Shi-Hao Chen, Jiing-Yuan Lin

Proceedings of the 13th Asia South Pacific Design Automation Conference, 2008

2007

DFM/DFY practices during physical designs for timing, signal integrity, and power.

Shi-Hao Chen, Ke-Cheng Chu, Jiing-Yuan Lin, Cheng-Hong Tsai

Proceedings of the 12th Conference on Asia South Pacific Design Automation, 2007

2005

Integration, Verification and Layout of a Complex Multimedia SOC.

Chien-Liang Chen, Jiing-Yuan Lin, Youn-Long Lin

Proceedings of the 2005 Design, 2005

2000

A new method for constructing IP level power model based on power sensitivity.

Heng-Liang Huang, Jiing-Yuan Lin, Wen-Zen Shen, Jing-Yang Jou

Proceedings of ASP-DAC 2000, 2000

1999

A structure-oriented power modeling technique for macrocells.

Jiing-Yuan Lin, Wen-Zen Shen, Jing-Yang Jou

IEEE Trans. Very Large Scale Integr. Syst., 1999

1997

A power modeling and characterization method for macrocells using structure information.

Jiing-Yuan Lin, Wen-Zen Shen, Jing-Yang Jou

Proceedings of the 1997 IEEE/ACM International Conference on Computer-Aided Design, 1997

CB-Power: a hierarchical cell-based power characterization and estimation environment for static CMOS circuits.

Wen-Zen Shen, Jiing-Yuan Lin, Jyh-Ming Lu

Proceedings of the ASP-DAC '97 Asia and South Pacific Design Automation Conference, 1997

1996

A power modeling and characterization method for the CMOS standard cell library.

Jiing-Yuan Lin, Wen-Zen Shen, Jing-Yang Jou

Proceedings of the 1996 IEEE/ACM International Conference on Computer-Aided Design, 1996

1995

Transistor reordering rules for power reduction in CMOS gates.

Wen-Zen Shen, Jiing-Yuan Lin, Fong-Wen Wang

Proceedings of the 1995 Conference on Asia Pacific Design Automation, Makuhari, Massa, Chiba, Japan, August 29, 1995

1994

A cell-based power estimation in CMOS combinational circuits.

Jiing-Yuan Lin, Tai-Chien Liu, Wen-Zen Shen

Proceedings of the 1994 IEEE/ACM International Conference on Computer-Aided Design, 1994