Jin-Ho Ahn

According to our database¹, Jin-Ho Ahn authored at least 20 papers between 2004 and 2017.

Collaborative distances:

Dijkstra number² of five.
Erdős number³ of four.

Timeline

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In proceedings

Article

PhD thesis

Dataset

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Links

On csauthors.net:

Bibliography

2017

Chain-Based Approach for Fast Through-Silicon-Via Coupling Delay Estimation.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2017

2014

Developing a cognitive evaluation method for serious game engineers.

[BibT_eX]

[DOI]

Clust. Comput., 2014

2013

Implementation of an LED tile controller for high-quality image display.

[BibT_eX]

[DOI]

Jin-Ho Ahn

Displays, 2013

2012

NoRSE: noise reduction and state evaluator for high-frequency single event traces.

[BibT_eX]

[DOI]

Nigel F. Reuel

Peter Bojo

Jingqing Zhang

Ardemis A. Boghossian

Jin-Ho Ahn

Jong-Ho Kim

Michael S. Strano

Bioinform., 2012

Development of a walking game for the elderly using controllers of hand buttons and foot boards.

[BibT_eX]

[DOI]

Proceedings of the 17th International Conference on Computer Games, 2012

2011

Noise-Tolerant DAC BIST Scheme Using Integral Calculus Approach.

[BibT_eX]

[DOI]

IEICE Trans. Electron., 2011

2010

A Memory-Efficient Pattern Matching with Hardware-Based Bit-Split String Matchers for Deep Packet Inspection.

[BibT_eX]

[DOI]

IEICE Trans. Commun., 2010

A Hardware-Efficient Pattern Matching Architecture Using Process Element Tree for Deep Packet Inspection.

[BibT_eX]

[DOI]

IEICE Trans. Commun., 2010

A high performance network-on-chip scheme using lossless data compression.

[BibT_eX]

[DOI]

IEICE Electron. Express, 2010

A memory-efficient heterogeneous parallel pattern matching scheme in deep packet inspection.

[BibT_eX]

[DOI]

IEICE Electron. Express, 2010

2009

An Efficient Hardware Architecture of the A-star Algorithm for the Shortest Path Search Engine.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Networked Computing and Advanced Information Management, 2009

An Ant Colony Optimization Approach for the Preference-Based Shortest Path Search.

[BibT_eX]

[DOI]

Proceedings of the Communication and Networking, 2009

2008

Total Energy Minimization of Real-Time Tasks in an On-Chip Multiprocessor Using Dynamic Voltage Scaling Efficiency Metric.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008

MTR-Fill: A Simulated Annealing-Based X-Filling Technique to Reduce Test Power Dissipation for Scan-Based Designs.

[BibT_eX]

[DOI]

IEICE Trans. Inf. Syst., 2008

System-Level Development and Verification of the FlexRay Communication Controller Model Based on SystemC.

[BibT_eX]

[DOI]

Proceedings of the Second International Conference on Future Generation Communication and Networking, 2008

2006

System on a Chip Implementation of Social Insect Behavior for Adaptive Network Routing.

[BibT_eX]

[DOI]

Proceedings of the Computational Intelligence, 2006

SoC Test Scheduling Algorithm Using ACO-Based Rectangle Packing.

[BibT_eX]

[DOI]

Jin-Ho Ahn

Sungho Kang

Proceedings of the Computational Intelligence, 2006

2005

A Practical Test Scheduling Using Network-Based TAM in Network on Chip Architecture.

[BibT_eX]

[DOI]

Jin-Ho Ahn

Byung In Moon

Sungho Kang

Proceedings of the Advances in Computer Systems Architecture, 10th Asia-Pacific Conference, 2005

2004

Route Reinforcement for Efficient QoS Routing Based on Ant Algorithm.

[BibT_eX]

[DOI]

Proceedings of the Information Networking, 2004

RAIN (RAndom Insertion) Scheduling Algorithm for SoC Test.

[BibT_eX]

[DOI]

Proceedings of the 13th Asian Test Symposium (ATS 2004), 2004

Jin-Ho Ahn

Timeline

Legend:

Links

On csauthors.net:

Bibliography

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