Jing Xie

Affiliations:
  • Pennsylvania State University, University Park, PA, USA


According to our database1, Jing Xie authored at least 9 papers between 2010 and 2014.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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In proceedings 
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PhD thesis 
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Links

On csauthors.net:

Bibliography

2014
Testable cross-power domain interface (CPDI) circuit design in monolithic 3D technology.
ACM J. Emerg. Technol. Comput. Syst., 2014

2013
Cost-driven 3D design optimization with metal layer reduction technique.
Proceedings of the International Symposium on Quality Electronic Design, 2013

CPDI: Cross-power-domain interface circuit design in monolithic 3D technology.
Proceedings of the International Symposium on Quality Electronic Design, 2013

2012
Mitigating electromigration of power supply networks using bidirectional current stress.
Proceedings of the Great Lakes Symposium on VLSI 2012, 2012

Yield-aware time-efficient testing and self-fixing design for TSV-based 3D ICs.
Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012

2010
Evaluation of using inductive/capacitive-coupling vertical interconnects in 3D network-on-chip.
Proceedings of the 2010 International Conference on Computer-Aided Design, 2010

Architectural benefits and design challenges for three-dimensional integrated circuits.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2010

A 3D SoC design for H.264 application with on-chip DRAM stacking.
Proceedings of the IEEE International Conference on 3D System Integration, 2010

3D memory stacking for fast checkpointing/restore applications.
Proceedings of the IEEE International Conference on 3D System Integration, 2010


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