Jingcheng Gu

According to our database, Jingcheng Gu authored at least 3 papers between 2025 and 2026.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2026

An Operator-Circuit Co-design Digital SOT-MRAM Computing-in-Memory Accelerator with Double Bit Density and Full-Utilized Bandwidth/Throughput.

Tianshuo Bai, Jingcheng Gu, Lehao Tan, Wente Yi, Haolin Ge, Han Zhang, Zhenyu Xue, He Zhang, Na Lei, Biao Pan

Proceedings of the Design, Automation & Test in Europe Conference, 2026

2025

PAR-CIM: A Precise/Approximate Reconfigurable Digital CIM Macro with 0.35-4b Fractional Mixed-Bitwidth Quantization.

Han Zhang, Zhenyu Xue, Wente Yi, Tianshuo Bai, Lehao Tan, Jingcheng Gu, Weijie Ding, Wang Kang, Biao Pan

Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2025

HyIMC: Analog-Digital Hybrid In-Memory Computing SoC for High-Quality Low-Latency Speech Enhancement.

Wanru Mao, Hanjie Liu, Guangyao Wang, Tianshuo Bai, Jingcheng Gu, Han Zhang, Xitong Yang, Aifei Zhang, Xiaohang Wei, Meng Wang, Wang Kang

Proceedings of the Design, Automation & Test in Europe Conference, 2025