Jingfei Jiang

Orcid: 0000-0002-7103-8650

According to our database1, Jingfei Jiang authored at least 53 papers between 2003 and 2024.

Collaborative distances:

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2024
Self-Supervised Learning-For Underwater Acoustic Signal Classification With Mixup.
IEEE J. Sel. Top. Appl. Earth Obs. Remote. Sens., 2024

2023
Sparse Reconstruction-Based Time-Delay Estimation Algorithm in the Exponential Correlation Domain.
IEEE Access, 2023

DSIRBS : A Layer-wise Balanced DNN Weight Pruning Method.
Proceedings of the 15th International Conference on Machine Learning and Computing, 2023

SMVAR: A Novel RNN Accelerator Based on Non-blocking Data Distribution Structure.
Proceedings of the IEEE International Conference on High Performance Computing & Communications, 2023

Auto-Divide GNN: Accelerating GNN Training with Subgraph Division.
Proceedings of the Euro-Par 2023: Parallel Processing - 29th International Conference on Parallel and Distributed Computing, Limassol, Cyprus, August 28, 2023

2022
A low-latency LSTM accelerator using balanced sparsity based on FPGA.
Microprocess. Microsystems, March, 2022

Evaluating a New Attention Framework Based on Matrix Blocking for Attention Models on FPGAs.
Proceedings of the 34th IEEE International Conference on Tools with Artificial Intelligence, 2022

MLPs: Efficient Training of MiniGo on Large-scale Heterogeneous Computing System.
Proceedings of the 28th IEEE International Conference on Parallel and Distributed Systems, 2022

Sparkle: A High Efficient Sparse Matrix Multiplication Accelerator for Deep Learning.
Proceedings of the IEEE 40th International Conference on Computer Design, 2022

2021
An energy-efficient convolutional neural network accelerator for speech classification based on FPGA and quantization.
CCF Trans. High Perform. Comput., 2021

A high-throughput scalable BNN accelerator with fully pipelined architecture.
CCF Trans. High Perform. Comput., 2021

Compressed LSTM using balanced sparsity.
Proceedings of the Ninth International Conference on Advanced Cloud and Big Data, 2021

RFC-HyPGCN: A Runtime Sparse Feature Compress Accelerator for Skeleton-Based GCNs Action Recognition Model with Hybrid Pruning.
Proceedings of the 32nd IEEE International Conference on Application-specific Systems, 2021

2020
Sliding mode control for a class of variable-order fractional chaotic systems.
J. Frankl. Inst., 2020

A Simplified Speaker Recognition System Based on FPGA Platform.
IEEE Access, 2020

A Dynamic Mapping Model for General CNN Accelerator Based on FPGA.
Proceedings of the Network and Parallel Computing, 2020

A Beamforming Method Based on Polarization Matching.
Proceedings of the 12th International Conference on Advanced Infocomm Technology, 2020

2019
Accelerating High Throughput Cipher Processing on Supercomputing Platform.
Int. J. Interdiscip. Telecommun. Netw., 2019

Enhancing 2D Representation via Adjacent Views for 3D Shape Retrieval.
Proceedings of the 2019 IEEE/CVF International Conference on Computer Vision, 2019

2018
Long Time Behavior and Global Dynamics of Simplified Von Karman Plate Without Rotational Inertia Driven by White Noise.
Symmetry, 2018

CaFPGA: An automatic generation model for CNN accelerator.
Microprocess. Microsystems, 2018

High performance robust audio event recognition system based on FPGA platform.
Cogn. Syst. Res., 2018

Study of Multilevel Parallel Algorithm of KPCA for Hyperspectral Images.
Proceedings of the Theoretical Computer Science - 36th National Conference, 2018

Design and Implementation of Convolutional Neural Network Accelerator with Variable Layer-by-layer Debugging.
Proceedings of the 2018 2nd International Conference on Deep Learning Technologies, 2018

Research on Parallel Acceleration for Deep Learning Inference Based on Many-Core ARM Platform.
Proceedings of the Advanced Computer Architecture - 12th Conference, 2018

Research on Acceleration Method of Speech Recognition Training.
Proceedings of the Advanced Computer Architecture - 12th Conference, 2018

2017
Throughput-Optimized FPGA Accelerator for Deep Convolutional Neural Networks.
ACM Trans. Reconfigurable Technol. Syst., 2017

The vibration transmissibility of a single degree of freedom oscillator with nonlinear fractional order damping.
Int. J. Syst. Sci., 2017

An FPGA-based processor for training convolutional neural networks.
Proceedings of the International Conference on Field Programmable Technology, 2017

Customized Architecture Technology for High Performance Computing.
Proceedings of the first Workshop on Emerging Technologies for software-defined and reconfigurable hardware-accelerated Cloud Datacenters, 2017

Accuracy Evaluation of Long Short Term Memory Network Based Language Model with Fixed-Point Arithmetic.
Proceedings of the Applied Reconfigurable Computing - 13th International Symposium, 2017

A Super-Vector Deep Learning Coprocessor with High Performance-Power Ratio.
Proceedings of the Advanced Topics in Intelligent Information and Database Systems,, 2017

2016
Coarse-Grained Architecture for Fingerprint Matching.
ACM Trans. Reconfigurable Technol. Syst., 2016

Performance modeling of hyper-scale custom machine for the principal steps in block Wiedemann algorithm.
J. Supercomput., 2016

Improved Survey Propagation on Graphics Processing Units.
Proceedings of the Green, Pervasive, and Cloud Computing - 11th International Conference, 2016

Automatic code generation of convolutional neural networks in FPGA implementation.
Proceedings of the 2016 International Conference on Field-Programmable Technology, 2016

2015
G2LC: Resources Autoscaling for Real Time Bioinformatics Applications in IaaS.
Comput. Math. Methods Medicine, 2015

Optimized deep belief networks on CUDA GPUs.
Proceedings of the 2015 International Joint Conference on Neural Networks, 2015

2014
Efficient parallel implementation of morphological operation on GPU and FPGA.
Proceedings of the Proceedings IEEE International Conference on Security, 2014

A high throughput K-best detector on FPGA.
Proceedings of the IEEE International Black Sea Conference on Communications and Networking, 2014

2013
A Flexible Memory Controller Supporting Deep Belief Networks with Fixed-Point Arithmetic.
Proceedings of the 2013 IEEE International Symposium on Parallel & Distributed Processing, 2013

CPU Load Prediction Using Support Vector Regression and Kalman Smoother for Cloud.
Proceedings of the 33rd International Conference on Distributed Computing Systems Workshops (ICDCS 2013 Workshops), 2013

Effect of fixed-point arithmetic on deep belief networks (abstract only).
Proceedings of the 2013 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2013

Empirical Evaluation of Fixed-Point Arithmetic for Deep Belief Networks.
Proceedings of the Reconfigurable Computing: Architectures, Tools and Applications, 2013

KSwSVR: A New Load Forecasting Method for Efficient Resources Provisioning in Cloud.
Proceedings of the 2013 IEEE International Conference on Services Computing, Santa Clara, CA, USA, June 28, 2013

2011
Research on Equal Symmetric Distributed Fault-tolerant Architecture and Strategy for Parallel Satellite System.
Proceedings of the 14th IEEE International Conference on Computational Science and Engineering, 2011

2010
A Unified Co-Processor Architecture for Matrix Decomposition.
J. Comput. Sci. Technol., 2010

An Efficient Coding Scheme for Tolerating Double Disk Failures.
Proceedings of the 12th IEEE International Conference on High Performance Computing and Communications, 2010

2009
A Fine-grained Pipelined Implementation of the LINPACK Benchmark on FPGAs.
Proceedings of the FCCM 2009, 2009

Fine-grained parallel application specific computing for RNA secondary structure prediction using SCFGS on FPGA.
Proceedings of the 2009 International Conference on Compilers, 2009

2006
A New Processor Architecture with a New Program Driving Method.
Proceedings of the 2006 International Conference on Computer Design & Conference on Computing in Nanotechnology, 2006

A New Computer Architecture Using a New Program Driving Method.
Proceedings of the 5th Annual IEEE/ACIS International Conference on Computer and Information Science (ICIS 2006) and 1st IEEE/ACIS International Workshop on Component-Based Software Engineering, 2006

2003
Reconfigurable Cipher Processing Framework and Implementation.
Proceedings of the Advanced Parallel Programming Technologies, 5th International Workshop, 2003


  Loading...