Jinglei Huang

According to our database, Jinglei Huang authored at least 15 papers between 2015 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2023

Task Modules Partitioning, Scheduling and Floorplanning for Partially Dynamically Reconfigurable Systems with Heterogeneous Resources.

Bo Ding, Jinglei Huang, Junpeng Wang, Qi Xu, Song Chen, Yi Kang

ACM Trans. Design Autom. Electr. Syst., November, 2023

Memory-aware Partitioning, Scheduling, and Floorplanning for Partially Dynamically Reconfigurable Systems.

Bo Ding, Jinglei Huang, Qi Xu, Junpeng Wang, Song Chen, Yi Kang

ACM Trans. Design Autom. Electr. Syst., January, 2023

2022

Synthesizing Brain-network-inspired Interconnections for Large-scale Network-on-chips.

Mengke Ge, Xiaobing Ni, Qi Xu, Song Chen, Jinglei Huang, Yi Kang, Feng Wu

ACM Trans. Design Autom. Electr. Syst., 2022

Task modules Partitioning, Scheduling and Floorplanning for Partially Dynamically Reconfigurable Systems Based on Modern Heterogeneous FPGAs.

Bo Ding, Jinglei Huang, Junpeng Wang, Qi Xu, Song Chen, Yi Kang

CoRR, 2022

2021

Solving slot allocation problem with multiple ATFM measures by using enhanced meta-heuristic algorithm.

Jing Tian, Xinchang Hao, Jibo Huang, Jinglei Huang, Mitsuo Gen

Comput. Ind. Eng., 2021

2020

Integrated Optimization of Partitioning, Scheduling, and Floorplanning for Partially Dynamically Reconfigurable Systems.

Song Chen, Jinglei Huang, Xiaodong Xu, Bo Ding, Qi Xu

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

Generalized Fault-Tolerance Topology Generation for Application-Specific Network-on-Chips.

Song Chen, Mengke Ge, Zhigang Li, Jinglei Huang, Qi Xu, Feng Wu

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

2019

Reconfigurable topology synthesis for application-specific NoC on partially dynamically reconfigurable systems.

Jinglei Huang, Xiaodong Xu, Nan Wang, Song Chen

Integr., 2019

2018

Lagrangian relaxation-based routing path allocation for application-specific network-on-chips.

Jinglei Huang, Wei Zhong, Zhigang Li, Song Chen

Integr., 2018

Integrated Optimization of Partitioning, Scheduling and Floorplanning for Partially Dynamically Reconfigurable Systems.

Song Chen, Jinglei Huang, Xiaodong Xu, Qi Xu

CoRR, 2018

2017

Reconfigurable topology synthesis for application-specific noc on partially dynamically reconfigurable FPGAs.

Jinglei Huang, Xiaodong Xu, Lan Yao, Song Chen

Proceedings of the ACM/IEEE 2017 International Workshop on System Level Interconnect Prediction, 2017

An Integrated Optimization Framework for Partitioning, Scheduling and Floorplanning on Partially Dynamically Reconfigurable FPGAs.

Xiaodong Xu, Qi Xu, Jinglei Huang, Song Chen

Proceedings of the on Great Lakes Symposium on VLSI 2017, 2017

Integer linear programming based fault-tolerant topology synthesis for application-specific NoC.

Zhigang Li, Jinglei Huang, Qi Xu, Song Chen

Proceedings of the 12th IEEE International Conference on ASIC, 2017

2016

Floorplanning and Topology Synthesis for Application-Specific Network-on-Chips with RF-Interconnect.

Jinglei Huang, Song Chen, Wei Zhong, Wenchao Zhang, Shengxi Diao, Fujiang Lin

ACM Trans. Design Autom. Electr. Syst., 2016

2015

Lagrangian relaxation based topology synthesis for Application-Specific Network-on-Chips.

Jinglei Huang, Zhigang Li, Wei Zhong, Song Chen

Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015