Jinpyo Park

According to our database1, Jinpyo Park authored at least 18 papers between 1999 and 2023.

Collaborative distances:

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2023
A Multi-Mode 8k-MAC HW-Utilization-Aware Neural Processing Unit With a Unified Multi-Precision Datapath in 4-nm Flagship Mobile SoC.
IEEE J. Solid State Circuits, 2023

2021
Neutral model-based interfacing of 3D design to support collaborative project management in the process plant industry.
J. Comput. Des. Eng., 2021

2017
Region-based dual bank register allocation for reduced instruction encoding Architectures.
Microprocess. Microsystems, 2017

2016
Learning-Based Power/Performance Optimization for Many-Core Systems With Extended-Range Voltage/Frequency Scaling.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016

2015
Procrustes<sup>1</sup>: Power Constrained Performance Improvement Using Extended Maximize-Then-Swap Algorithm.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015

2013
Dynamic thread mapping for high-performance, power-efficient heterogeneous many-core systems.
Proceedings of the 2013 IEEE 31st International Conference on Computer Design, 2013

Learning the optimal operating point for many-core systems with extended range voltage/frequency scaling.
Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis, 2013

2012
Optimizing Video Application Design for Phase-Change RAM-Based Main Memory.
IEEE Trans. Very Large Scale Integr. Syst., 2012

2007
Securing More Registers with Reduced Instruction Encoding Architectures.
Proceedings of the 13th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA 2007), 2007

2004
Optimistic register coalescing.
ACM Trans. Program. Lang. Syst., 2004

2002
Unroll-Based Copy Elimination for Enhanced Pipeline Scheduling.
IEEE Trans. Computers, 2002

Experiences with Retargeting the Java Hotspot(tm) Virtual Machine.
Proceedings of the 16th International Parallel and Distributed Processing Symposium (IPDPS 2002), 2002

2001
Register Allocation for Banked Register File.
Proceedings of The Workshop on Languages, 2001

2000
Unroll-based register coalescing.
Proceedings of the 14th international conference on Supercomputing, 2000

Practical Experiences with Java Compilation.
Proceedings of the High Performance Computing, 2000

1999
Lightweight monitor for Java VM.
SIGARCH Comput. Archit. News, 1999

Unroll-Based Copy Elimination for Enhanced Pipeline Scheduling.
Proceedings of the Languages and Compilers for Parallel Computing, 1999

LaTTe: A Java VM Just-In-Time Compiler with Fast and Efficient Register Allocation.
Proceedings of the 1999 International Conference on Parallel Architectures and Compilation Techniques, 1999


  Loading...