Diana Marculescu
Orcid: 0000-0002-5734-4221
According to our database1,
Diana Marculescu
authored at least 218 papers
between 1994 and 2024.
Collaborative distances:
Collaborative distances:
Awards
ACM Fellow
ACM Fellow 2019, "For contributions to the design and optimization of energy-aware computing systems".
IEEE Fellow
IEEE Fellow 2015, "For contributions to design and optimization of energy-aware computing systems".
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
Online presence:
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on orcid.org
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on id.loc.gov
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on dl.acm.org
On csauthors.net:
Bibliography
2024
PaPr: Training-Free One-Step Patch Pruning with Lightweight ConvNets for Faster Inference.
CoRR, 2024
Proceedings of the IEEE/CVF Winter Conference on Applications of Computer Vision, 2024
Proceedings of the IEEE/CVF Winter Conference on Applications of Computer Vision, 2024
2023
ACM Trans. Embed. Comput. Syst., March, 2023
CoRR, 2023
AVE-CLIP: AudioCLIP-based Multi-window Temporal Transformer for Audio Visual Event Localization.
Proceedings of the IEEE/CVF Winter Conference on Applications of Computer Vision, 2023
Proceedings of the Advances in Neural Information Processing Systems 36: Annual Conference on Neural Information Processing Systems 2023, 2023
Jumping through Local Minima: Quantization in the Loss Landscape of Vision Transformers.
Proceedings of the IEEE/CVF International Conference on Computer Vision, 2023
CLIP4VideoCap: Rethinking Clip for Video Captioning with Multiscale Temporal Fusion and Commonsense Knowledge.
Proceedings of the IEEE International Conference on Acoustics, 2023
Proceedings of the International Conference on Field Programmable Technology, 2023
Proceedings of the IEEE/CVF Conference on Computer Vision and Pattern Recognition, 2023
Proceedings of the Thirty-Seventh AAAI Conference on Artificial Intelligence, 2023
2022
DeepNVM++: Cross-Layer Modeling and Optimization Framework of Nonvolatile Memories for Deep Learning.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022
CoRR, 2022
CoRR, 2022
Proceedings of the IEEE/CVF Conference on Computer Vision and Pattern Recognition Workshops, 2022
2021
Proceedings of the Second Teaching Machine Learning and Artificial Intelligence Workshop, 2021
Proceedings of the Machine Learning and Knowledge Discovery in Databases. Research Track, 2021
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2021
Proceedings of the IEEE Conference on Computer Vision and Pattern Recognition Workshops, 2021
Proceedings of the IEEE Conference on Computer Vision and Pattern Recognition Workshops, 2021
2020
Single-Path Mobile AutoML: Efficient ConvNet Design and NAS Hyperparameter Optimization.
IEEE J. Sel. Top. Signal Process., 2020
Editorial: Special Issue on Compact Deep Neural Networks With Industrial Applications.
IEEE J. Sel. Top. Signal Process., 2020
DeepNVM++: Cross-Layer Modeling and Optimization Framework of Non-Volatile Memories for Deep Learning.
CoRR, 2020
The Architectural Implications of Distributed Reinforcement Learning on CPU-GPU Systems.
CoRR, 2020
Workshops on Extreme Scale Design Automation (ESDA) Challenges and Opportunities for 2025 and Beyond.
CoRR, 2020
Improving the Adversarial Robustness of Transfer Learning via Noisy Feature Distillation.
CoRR, 2020
ViP: Virtual Pooling for Accelerating CNN-based Image Classification and Object Detection.
Proceedings of the IEEE Winter Conference on Applications of Computer Vision, 2020
Proceedings of the KDD '20: The 26th ACM SIGKDD Conference on Knowledge Discovery and Data Mining, 2020
Proceedings of the Computer Vision - ECCV 2020 Workshops, 2020
DeepNVM: A Framework for Modeling and Analysis of Non-Volatile Memory Technologies for Deep Learning Applications.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020
Proceedings of the 2020 IEEE/CVF Conference on Computer Vision and Pattern Recognition, 2020
2019
IEEE Trans. Neural Networks Learn. Syst., 2019
Learning-Based Application-Agnostic 3D NoC Design for Heterogeneous Manycore Systems.
IEEE Trans. Computers, 2019
Proceedings of the Machine Learning and Knowledge Discovery in Databases, 2019
Proceedings of Machine Learning and Systems 2019, 2019
FLightNNs: Lightweight Quantized Deep Neural Networks for Fast and Accurate Inference.
Proceedings of the 56th Annual Design Automation Conference 2019, 2019
Proceedings of the IEEE Conference on Computer Vision and Pattern Recognition, 2019
2018
ACM Trans. Reconfigurable Technol. Syst., 2018
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018
On-Chip Communication Network for Efficient Training of Deep Convolutional Networks on Heterogeneous Manycore Systems.
IEEE Trans. Computers, 2018
CoRR, 2018
Computer, 2018
Proceedings of the 2018 IEEE International Conference on Data Mining Workshops, 2018
Proceedings of the International Conference on Computer-Aided Design, 2018
Proceedings of the International Conference on Computer-Aided Design, 2018
Proceedings of the International Conference on Computer-Aided Design, 2018
HyperPower: Power- and memory-constrained hyper-parameter optimization for neural networks.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018
Proceedings of the 23rd Asia and South Pacific Design Automation Conference, 2018
2017
IEEE Trans. Very Large Scale Integr. Syst., 2017
Temperature Effect Inversion-Aware Power-Performance Optimization for FinFET-Based Multicore Systems.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017
Thread Progress Equalization: Dynamically Adaptive Power-Constrained Performance Optimization of Multi-Threaded Applications.
IEEE Trans. Computers, 2017
Priority-Aware Near-Optimal Scheduling for Heterogeneous Multi-Core Systems with Specialized Accelerators.
CoRR, 2017
CoRR, 2017
3D NoC-Enabled Heterogeneous Manycore Architectures for Accelerating CNN Training: Performance and Thermal Trade-offs.
Proceedings of the Eleventh IEEE/ACM International Symposium on Networks-on-Chip, 2017
LightNN: Filling the Gap between Conventional Deep Neural Networks and Binarized Networks.
Proceedings of the on Great Lakes Symposium on VLSI 2017, 2017
Proceedings of the 25th ACM SIGSPATIAL International Conference on Advances in Geographic Information Systems, 2017
M3A: Model, MetaModel and Anomaly Detection for Inter-arrivals of Web Searches and Postings.
Proceedings of the 2017 IEEE International Conference on Data Science and Advanced Analytics, 2017
Enhancing precipitation models by capturing multivariate and multiscale climate dynamics.
Proceedings of the 3rd International Workshop on Cyber-Physical Systems for Smart Water Networks, 2017
Proceedings of The 9th Asian Conference on Machine Learning, 2017
2016
Wireless NoC and Dynamic VFI Codesign: Energy Efficiency Without Performance Penalty.
IEEE Trans. Very Large Scale Integr. Syst., 2016
A Support Vector Regression (SVR)-Based Latency Model for Network-on-Chip (NoC) Architectures.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016
Learning-Based Power/Performance Optimization for Many-Core Systems With Extended-Range Voltage/Frequency Scaling.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016
Wireless NoC for VFI-Enabled Multicore Chip Design: Performance Evaluation and Design Trade-Offs.
IEEE Trans. Computers, 2016
A two-level approximate model driven framework for characterizing Multi-Cell Upsets impacts on processors.
Microelectron. J., 2016
Thread Progress Equalization: Dynamically Adaptive Power and Performance Optimization of Multi-threaded Applications.
CoRR, 2016
Proceedings of the 2016 International Symposium on Low Power Electronics and Design, 2016
Proceedings of the 35th International Conference on Computer-Aided Design, 2016
Hybrid network-on-chip architectures for accelerating deep learning kernels on heterogeneous manycore platforms.
Proceedings of the 2016 International Conference on Compilers, 2016
2015
Procrustes<sup>1</sup>: Power Constrained Performance Improvement Using Extended Maximize-Then-Swap Algorithm.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015
Exploiting component dependency for accurate and efficient soft error analysis via Probabilistic Graphical Models.
Microelectron. Reliab., 2015
The (Low) Power of Less Wiring: Enabling Energy Efficiency in Many-Core Platforms Through Wireless NoC.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2015
TEI-Turbo: Temperature Effect Inversion-Aware Turbo Boost for FinFET-Based Multi-Core Systems.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2015
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2015
Proceedings of the Sixth International Green and Sustainable Computing Conference, 2015
Distributed reinforcement learning for power limited many-core system performance optimization.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015
Proceedings of the 52nd Annual Design Automation Conference, 2015
Understanding and Using Heterogeneity for High Performance, Energy Efficient Computing: Special Session Extended Abstract.
Proceedings of the 20th International Conference on Control Systems and Computer Science, 2015
2014
IEEE Trans. Very Large Scale Integr. Syst., 2014
Statistical Peak Temperature Prediction and Thermal Yield Improvement for 3D Chip Multiprocessors.
ACM Trans. Design Autom. Electr. Syst., 2014
Proceedings of the Advances in Knowledge Discovery and Data Mining, 2014
Proceedings of the 2014 International Symposium on Integrated Circuits (ISIC), 2014
The EDA Challenges in the Dark Silicon Era: Temperature, Reliability, and Variability Perspectives.
Proceedings of the 51st Annual Design Automation Conference 2014, 2014
Proceedings of the 2014 International Conference on Compilers, 2014
Proceedings of the 19th Asia and South Pacific Design Automation Conference, 2014
2013
IEEE Trans. Very Large Scale Integr. Syst., 2013
Mitigating the Impact of Process Variation on the Performance of 3-D Integrated Circuits.
IEEE Trans. Very Large Scale Integr. Syst., 2013
Editorial to special section on networks on chip: Architecture, tools, and methodologies.
ACM Trans. Design Autom. Electr. Syst., 2013
Found. Trends Electron. Des. Autom., 2013
"Scaling" the impact of EDA education Preliminary findings from the CCC workshop series on extreme scale design automation.
Proceedings of the 2013 IEEE International Conference on Microelectronic Systems Education, 2013
Impact of manufacturing process variations on performance and thermal characteristics of 3D ICs: Emerging challenges and new solutions.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013
Dynamic thread mapping for high-performance, power-efficient heterogeneous many-core systems.
Proceedings of the 2013 IEEE 31st International Conference on Computer Design, 2013
Proceedings of the IEEE International Conference on Acoustics, 2013
Cherry-picking: exploiting process variations in dark-silicon homogeneous chip multi-processors.
Proceedings of the Design, Automation and Test in Europe, 2013
SVR-NoC: a performance analysis tool for network-on-chips using learning-based support vector regression model.
Proceedings of the Design, Automation and Test in Europe, 2013
HaDeS: architectural synthesis for <u>h</u>eterogeneous <u>d</u>ark <u>s</u>ilicon chip multi-processors.
Proceedings of the 50th Annual Design Automation Conference 2013, 2013
Proceedings of the 50th Annual Design Automation Conference 2013, 2013
Learning the optimal operating point for many-core systems with extended range voltage/frequency scaling.
Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis, 2013
2012
IEEE Trans. Very Large Scale Integr. Syst., 2012
System-Level Leakage Variability Mitigation for MPSoC Platforms Using Body-Bias Islands.
IEEE Trans. Very Large Scale Integr. Syst., 2012
On the Impact of Manufacturing Process Variations on the Lifetime of Sensor Networks.
ACM Trans. Embed. Comput. Syst., 2012
Guest Editorial Special Section on PAR-CAD: Parallel CAD Algorithms and CAD for Parallel Architectures/Systems.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2012
Technology-driven limits on runtime power management algorithms for multiprocessor systems-on-chip.
ACM J. Emerg. Technol. Comput. Syst., 2012
Efficient on-line module-level wake-up scheduling for high performance multi-module designs.
Proceedings of the International Symposium on Physical Design, 2012
Power-aware performance increase via core/uncore reinforcement control for chip-multiprocessors.
Proceedings of the International Symposium on Low Power Electronics and Design, 2012
Mitigating lifetime underestimation: A system-level approach considering temperature variations and correlations between failure mechanisms.
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012
A learning-based autoregressive model for fast transient thermal analysis of chip-multiprocessors.
Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012
2011
Special session 4A: New topics parametric yield and reliability of 3D integrated circuits: New challenges and solutions.
Proceedings of the 29th IEEE VLSI Test Symposium, 2011
Analysis and mitigation of NBTI-induced performance degradation for power-gated circuits.
Proceedings of the 2011 International Symposium on Low Power Electronics and Design, 2011
PRICE: Power reduction by placement and clock-network co-synthesis for pulsed-latch designs.
Proceedings of the 2011 IEEE/ACM International Conference on Computer-Aided Design, 2011
Proceedings of the 33rd Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2011
Proceedings of the Design, Automation and Test in Europe, 2011
Statistical thermal evaluation and mitigation techniques for 3D Chip-Multiprocessors in the presence of process variations.
Proceedings of the Design, Automation and Test in Europe, 2011
Proceedings of the ACM International Conference on Bioinformatics, 2011
2010
Multiple Transient Faults in Combinational and Sequential Circuits: A Systematic Approach.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2010
Custom feedback control: enabling truly scalable on-chip power management for MPSoCs.
Proceedings of the 2010 International Symposium on Low Power Electronics and Design, 2010
Process variation aware performance modeling and dynamic power management for multi-core systems.
Proceedings of the 2010 International Conference on Computer-Aided Design, 2010
Proceedings of the Design, Automation and Test in Europe, 2010
Proceedings of the 47th Design Automation Conference, 2010
2009
IEEE Trans. Very Large Scale Integr. Syst., 2009
IEEE Trans. Very Large Scale Integr. Syst., 2009
Power Management of Voltage/Frequency Island-Based Systems Using Hardware-Based Methods.
IEEE Trans. Very Large Scale Integr. Syst., 2009
A systematic approach to modeling and analysis of transient faults in logic circuits.
Proceedings of the 10th International Symposium on Quality of Electronic Design (ISQED 2009), 2009
3D-GCP: An analytical model for the impact of process variations on the critical path delay distribution of 3D ICs.
Proceedings of the 10th International Symposium on Quality of Electronic Design (ISQED 2009), 2009
Proceedings of the 2009 International Symposium on Physical Design, 2009
Integrating dynamic voltage/frequency scaling and adaptive body biasing using test-time voltage selection.
Proceedings of the 2009 International Symposium on Low Power Electronics and Design, 2009
Proceedings of the 15th International Conference on High-Performance Computer Architecture (HPCA-15 2009), 2009
Joint logic restructuring and pin reordering against NBTI-induced performance degradation.
Proceedings of the Design, Automation and Test in Europe, 2009
Proceedings of the Design, Automation and Test in Europe, 2009
Technology-driven limits on DVFS controllability of multiple voltage-frequency island designs: a system-level perspective.
Proceedings of the 46th Design Automation Conference, 2009
2008
IEEE Trans. Very Large Scale Integr. Syst., 2008
System-level throughput analysis for process variation aware multiple voltage-frequency island designs.
ACM Trans. Design Autom. Electr. Syst., 2008
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008
Process-Driven Variability Analysis of Single and Multiple Voltage-Frequency Island Latency-Constrained Systems.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008
Proceedings of the 26th International Conference on Computer Design, 2008
Proceedings of the 2008 International Conference on Computer-Aided Design, 2008
Design Variability: Challenges and Solutions at Microarchitecture-Architecture Level.
Proceedings of the Design, Automation and Test in Europe, 2008
Variation-adaptive feedback control for networks-on-chip with multiple clock domains.
Proceedings of the 45th Design Automation Conference, 2008
Proceedings of the 45th Design Automation Conference, 2008
Proceedings of the 6th International Conference on Hardware/Software Codesign and System Synthesis, 2008
Proceedings of the 13th Asia South Pacific Design Automation Conference, 2008
2007
Proceedings of the 8th International Symposium on Quality of Electronic Design (ISQED 2007), 2007
Proceedings of the 2007 International Symposium on Low Power Electronics and Design, 2007
Proceedings of the High Performance Embedded Architectures and Compilers, 2007
An 0.9 × 1.2", low power, energy-harvesting system with custom multi-channel communication interface.
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007
Interactive presentation: System-level process variation driven throughput analysis for single and multiple voltage-frequency island designs.
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007
Proceedings of the 44th Design Automation Conference, 2007
2006
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006
Proceedings of the 2006 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2006), 2006
System-level process-driven variability analysis for single and multiple voltage-frequency island systems.
Proceedings of the 2006 International Conference on Computer-Aided Design, 2006
Proceedings of the 43rd Design Automation Conference, 2006
Proceedings of the 4th International Conference on Hardware/Software Codesign and System Synthesis, 2006
2005
IEEE Trans. Very Large Scale Integr. Syst., 2005
IEEE Trans. Very Large Scale Integr. Syst., 2005
ACM Trans. Embed. Comput. Syst., 2005
System level power and performance modeling of GALS point-to-point communication interfaces.
Proceedings of the 2005 International Symposium on Low Power Electronics and Design, 2005
Proceedings of the 32st International Symposium on Computer Architecture (ISCA 2005), 2005
Proceedings of the 2005 Design, 2005
Proceedings of the 42nd Design Automation Conference, 2005
Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005
2004
Impact of technology scaling on energy aware execution cache-based microarchitectures.
Proceedings of the 2004 International Symposium on Low Power Electronics and Design, 2004
Proceedings of the 2004 International Symposium on Low Power Electronics and Design, 2004
Toward an Integrated Design Methodology for Fault-Tolerant, Multiple Clock/Voltage Integrated Systems.
Proceedings of the 22nd IEEE International Conference on Computer Design: VLSI in Computers & Processors (ICCD 2004), 2004
Proceedings of the 2004 Design, 2004
Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, 2004
2003
IEEE Trans. Computers, 2003
Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003
A mixed-clock issue queue design for globally asynchronous, locally synchronous processor cores.
Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003
Proceedings of the 2003 International Conference on Computer-Aided Design, 2003
Proceedings of the 2003 International Conference on Computer-Aided Design, 2003
Pre-Characterization Free, Efficient Power/Performance Analysis of Embedded and General Purpose Software Applications.
Proceedings of the 2003 Design, 2003
Ambient Intelligence Visions and Achievements: Linking Abstract Ideas to Real-World Concepts.
Proceedings of the 2003 Design, 2003
Efficient Power/Performance Analysis of Embedded and General Purpose Software Applications.
Proceedings of the Embedded Software for SoC, 2003
Proceedings of the Embedded Software for SoC, 2003
2002
IEEE Trans. Very Large Scale Integr. Syst., 2002
Does Q=MC2? (On the Relationship between Quality in Electronic Design and the Model of Colloidal Computing, invited).
Proceedings of the 3rd International Symposium on Quality of Electronic Design, 2002
Power and Performance Evaluation of Globally Asynchronous Locally Synchronous Processors.
Proceedings of the 29th International Symposium on Computer Architecture (ISCA 2002), 2002
Proceedings of the 2002 IEEE/ACM International Conference on Computer-aided Design, 2002
Proceedings of the 39th Design Automation Conference, 2002
2001
Proceedings of the 2001 International Symposium on Low Power Electronics and Design, 2001
Application-Driven Processor Design Exploration for Power-Performance Trade-off Analysis.
Proceedings of the 2001 IEEE/ACM International Conference on Computer-Aided Design, 2001
Proceedings of the Conference on Design, Automation and Test in Europe, 2001
2000
IEEE Trans. Very Large Scale Integr. Syst., 2000
Stochastic sequential machine synthesis with application to constrained sequence generation.
ACM Trans. Design Autom. Electr. Syst., 2000
Proceedings of the 2000 International Symposium on Low Power Electronics and Design, 2000
1999
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1999
Proceedings of the 1999 International Symposium on Low Power Electronics and Design, 1999
1998
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1998
Trace-Driven Steady-State Probability Estimation in FSMs with Application to Power Estimation.
Proceedings of the 1998 Design, 1998
1997
Composite sequence compaction for finite-state machines using block entropy and high-order Markov models.
Proceedings of the 1997 International Symposium on Low Power Electronics and Design, 1997
Proceedings of the 34st Conference on Design Automation, 1997
Proceedings of the 34st Conference on Design Automation, 1997
Proceedings of the ASP-DAC '97 Asia and South Pacific Design Automation Conference, 1997
1996
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1996
Proceedings of the 33st Conference on Design Automation, 1996
Proceedings of the 33st Conference on Design Automation, 1996
1995
Proceedings of the 1995 International Symposium on Low Power Design 1995, 1995
Proceedings of the 32st Conference on Design Automation, 1995
1994
Proceedings of the 1994 IEEE/ACM International Conference on Computer-Aided Design, 1994