Jochen Rust

Orcid: 0000-0002-1345-076X

According to our database1, Jochen Rust authored at least 56 papers between 2010 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2023
Let's go below: Potential of Undervolting on Low-Power FPGAs.
Proceedings of the 11th International Workshop on Energy Harvesting & Energy-Neutral Sensing Systems, 2023

Hybrid SORN Hardware Accelerator for Support Vector Machines.
Proceedings of the Next Generation Arithmetic - 4th International Conference, 2023

Fused Three-Input SORN Arithmetic.
Proceedings of the Next Generation Arithmetic - 4th International Conference, 2023

2022
Hybrid SORN Implementation of k-Nearest Neighbor Algorithm on FPGA.
Proceedings of the 20th IEEE Interregional NEWCAS Conference, 2022

Improving the Precision of SORN Arithmetic by Introducing Fused Operations.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

Beat to BEAT - Non-Invasive Investigation of Cardiac Function on the International Space Station.
Proceedings of the Advances in Informatics, Management and Technology in Healthcare, 2022

Adaptive J-Wave Detection Architecture for Online BCG-Complex Recognition on FPGA.
Proceedings of the 29th IEEE International Conference on Electronics, Circuits and Systems, 2022

A Differential BCG Sensor System for Long Term Health Monitoring Experiment on the ISS.
Proceedings of the 18th International Conference on Distributed Computing in Sensor Systems, 2022

Demo: BCG Measurement by differential Sensing in Real-Time.
Proceedings of the 18th International Conference on Distributed Computing in Sensor Systems, 2022

On the Implementation of Edge Detection Algorithms with SORN Arithmetic.
Proceedings of the Next Generation Arithmetic - Third International Conference, 2022

2021
Hardware Implementation of a Latency-Reduced Sphere Decoder With SORN Preprocessing.
IEEE Access, 2021

Wireless Compose-2: A wireless communication network with a Ballistocardiography Smart-Shirt experiment in the ISS Columbus module.
Proceedings of the 2021 IEEE International Conference on Wireless for Space and Extreme Environments, 2021

2020
A Hardware Generator for SORN Arithmetic.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

A High-Performance Data Processing Unit for Next Generation Satellite Transceivers.
Proceedings of the 8th IEEE International Conference on Wireless for Space and Extreme Environments, 2020

Complexity Reduction for Sphere Decoding using Unum-Type-II-Based SORN-Arithmetic.
Proceedings of the 9th International Conference on Modern Circuits and Systems Technologies, 2020

Application-Specific Analysis of Different SORN Datatypes for Unum Type-2-Based Arithmetic.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

SORN-based Cascade Support Vector Machine.
Proceedings of the 28th European Signal Processing Conference, 2020

Combining Fixed-Point and SORN Arithmetic in a MIMO BPSK-Symbol Detection Architecture.
Proceedings of the 31st IEEE International Conference on Application-specific Systems, 2020

Hardware Architecture of a Decentralized Massive MIMO Equalizer based on Gauss-Seidel Detection.
Proceedings of the 54th Asilomar Conference on Signals, Systems, and Computers, 2020

2019
DRACON: A Dedicated Hardware Infrastructure for Scalable Run-Time Management on Many-Core Systems.
IEEE Access, 2019

Efficient Initialization of Iterative Linear Massive MIMO Uplink Detectors by Binary Jacobi Synthesis.
Proceedings of the 23rd International ITG Workshop on Smart Antennas, 2019

Parallel Data Reduction Method for an Industrial Massive MIMO Detector using "Tall Skinny QR" Decomposition.
Proceedings of the 23rd International ITG Workshop on Smart Antennas, 2019

On Blockchain-Based Dynamic Resource Allocation for Concurrent Industrial Wireless Premises Networks.
Proceedings of the 2019 International Conference on Wireless and Mobile Computing, 2019

Reliability of an Industrial Wireless Communication System using Approximate Units.
Proceedings of the 29th International Symposium on Power and Timing Modeling, 2019

Adaptive Bivariate Function Generation based on Chebyshev-Polynomials.
Proceedings of the 17th IEEE International New Circuits and Systems Conference, 2019

Ultra Low Latency Implementation of Robust Channel Estimation and Equalization for Industrial Wireless Communication Systems.
Proceedings of the 17th IEEE International New Circuits and Systems Conference, 2019

Enhanced Symbol Synchronization for Multi-User High Reliable Dynamic Industrial Wireless Communication.
Proceedings of the 17th IEEE International New Circuits and Systems Conference, 2019

SORN Arithmetic for MIMO Symbol Detection - Exploration of the Type-2 Unum Format.
Proceedings of the 17th IEEE International New Circuits and Systems Conference, 2019

Low-Complexity 2-Coordinates Descent for Near-Optimal MMSE Soft-Output Massive MIMO Uplink Data Detection.
Proceedings of the 27th European Signal Processing Conference, 2019

Decentralized Massive MIMO Uplink Signal Estimation by Binary Multistep Synthesis.
Proceedings of the 53rd Asilomar Conference on Signals, Systems, and Computers, 2019

FPGA Prototyping of a High-Resolution TerraSAR-X Image Processor for Iceberg Detection.
Proceedings of the 53rd Asilomar Conference on Signals, Systems, and Computers, 2019

2018
Random Subsampling based Signal Detection for Spatial Correlated Massive MIMO Channels.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

FPGA-based Baseband Solution for High Performance Industrial Wireless Communication.
Proceedings of the 23rd IEEE International Conference on Digital Signal Processing, 2018

Hardware Implementation of Basic Arithmetics and Elementary Functions for Unum Computing.
Proceedings of the 52nd Asilomar Conference on Signals, Systems, and Computers, 2018

2017
Hardware-Efficient QR-Decomposition Using Bivariate Numeric Function Approximation.
IEEE Trans. Circuits Syst. I Regul. Pap., 2017

Approximate computing of two-variable numeric functions using multiplier-less gradients.
Microprocess. Microsystems, 2017

Exploiting special-purpose function approximation for hardware-efficient QR-decomposition.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

2016
Bivariate function approximation with encoded gradients.
Proceedings of the IEEE Nordic Circuits and Systems Conference, 2016

Dynamically reconfigurable real-time hardware architecture for channel utilisation analysis in industrial wireless communication.
Proceedings of the IEEE Nordic Circuits and Systems Conference, 2016

Hardware-accelerated reconstruction of compressed neural signals based on inpainting.
Proceedings of the 2016 MIXDES, 2016

High-performance bivariate numeric function approximation for hardware-efficient QR-decomposition.
Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016

High throughput architecture for inpainting-based recovery of correlated neural signals.
Proceedings of the 24th European Signal Processing Conference, 2016

On high-accuracy direct digital frequency synthesis using linear function approximation.
Proceedings of the 24th European Signal Processing Conference, 2016

Rapid digital architecture design of orthogonal matching pursuit.
Proceedings of the 24th European Signal Processing Conference, 2016

Design of a multi-core hardware architecture for consensus-based MIMO detection algorithms.
Proceedings of the 50th Asilomar Conference on Signals, Systems and Computers, 2016

2015
Two-variable numeric function approximation using least-squares-based regression.
Proceedings of the Nordic Circuits and Systems Conference, 2015

Design method for multiplier-less two-variable numeric function approximation.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

QR-decomposition architecture based on two-variable numeric function approximation.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

2013
Low complexity QR-decomposition architecture using the logarithmic number system.
Proceedings of the Design, Automation and Test in Europe, 2013

2012
Reconfigurable architecture of a hybrid synchronisation algorithm for LTE.
Proceedings of the 23rd IEEE International Symposium on Personal, 2012

Design and implementation of a neurocomputing ASIP for environmental monitoring in WSN.
Proceedings of the 19th IEEE International Conference on Electronics, Circuits and Systems, 2012

Design and implementation of alow complexity NCO based CFO compensation unit.
Proceedings of the 20th European Signal Processing Conference, 2012

A Direct Digital Frequency Synthesizer based on automatic nonuniform piecewise function generation.
Proceedings of the 20th European Signal Processing Conference, 2012

2011
A High Performance Neurocomputing Algorithm for Prediction Tasks in Wireless Sensor Networks.
Proceedings of the 4th IFIP International Conference on New Technologies, 2011

Implementation of a Low Power Low Complexity ASIP for various Sphere Decoding Algorithms.
Proceedings of the European Wireless 2011, April 27-29, 2011, Vienna, Austria., 2011

2010
Strukturelle Verifikation mittels parser-gesteuerter Netzlisten-Traversierung.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2010


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