Alberto García Ortiz
Orcid: 0000-0002-6461-3864
According to our database1,
Alberto García Ortiz
authored at least 142 papers
between 2002 and 2023.
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Bibliography
2023
Frontiers Comput. Neurosci., February, 2023
IEEE Access, 2023
Proceedings of the 12th International Conference on Modern Circuits and Systems Technologies, 2023
Empirical Analysis of Full-System Approximation on Non-Spiking and Spiking Neural Networks.
Proceedings of the 12th International Conference on Modern Circuits and Systems Technologies, 2023
Proceedings of the 12th International Conference on Modern Circuits and Systems Technologies, 2023
Proceedings of the 12th International Conference on Modern Circuits and Systems Technologies, 2023
Integrity Assessment of Maritime Object Detection Impacted by Partial Camera Obstruction.
Proceedings of the 7th International Conference on System Reliability and Safety, 2023
2022
Ratatoskr: An Open-Source Framework for In-Depth Power, Performance, and Area Analysis and Optimization in 3D NoCs.
ACM Trans. Model. Comput. Simul., 2022
Implications of Non-Uniform Deadline Scaling to Quality of Service Under Single Errors.
IEEE Access, 2022
Proceedings of the 18th International Conference on Mobility, Sensing and Networking, 2022
Proceedings of the 11th International Conference on Modern Circuits and Systems Technologies, 2022
Accelerating Non-Negative Matrix Factorization on Embedded FPGA with Hybrid Logarithmic Dot-Product Approximation.
Proceedings of the 15th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2022
Proceedings of the ISLPED '22: ACM/IEEE International Symposium on Low Power Electronics and Design, Boston, MA, USA, August 1, 2022
Partial Camera Obstruction Detection Using Single Value Image Metrics and Data Augmentation.
Proceedings of the 6th International Conference on System Reliability and Safety, 2022
MemPool-3D: Boosting Performance and Efficiency of Shared-L1 Memory Many-Core Clusters with 3D Integration.
Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022
2021
High-Performance Logic-on-Memory Monolithic 3-D IC Designs for Arm Cortex-A Processors.
IEEE Trans. Very Large Scale Integr. Syst., 2021
Combination of Task Allocation and Approximate Computing for Fog-Architecture-Based IoT.
IEEE Internet Things J., 2021
IEEE Access, 2021
Accelerating Spike-by-Spike Neural Networks on FPGA With Hybrid Custom Floating-Point and Logarithmic Dot-Product Approximation.
IEEE Access, 2021
Proceedings of the 10th International Conference on Modern Circuits and Systems Technologies, 2021
Power, Performance, Area and Cost Analysis of Memory-on-Logic Face-to-Face Bonded 3D Processor Designs.
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2021
Bridging the Frequency Gap in Heterogeneous 3D SoCs through Technology-Specific NoC Router Architectures.
Proceedings of the ASPDAC '21: 26th Asia and South Pacific Design Automation Conference, 2021
2020
IEEE Trans. Circuits Syst. II Express Briefs, 2020
IEEE Trans. Circuits Syst. II Express Briefs, 2020
Integr., 2020
IEEE Comput. Archit. Lett., 2020
Proceedings of the 9th International Conference on Modern Circuits and Systems Technologies, 2020
A Runtime-Reconfigurable Operand Masking Technique for Energy-Efficient Approximate Processor Architectures.
Proceedings of the 9th International Conference on Modern Circuits and Systems Technologies, 2020
Proceedings of the 9th International Conference on Modern Circuits and Systems Technologies, 2020
Accelerator Framework of Spike-By-Spike Neural Networks for Inference and Incremental Learning in Embedded Systems.
Proceedings of the 9th International Conference on Modern Circuits and Systems Technologies, 2020
Proceedings of the 9th International Conference on Modern Circuits and Systems Technologies, 2020
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
Macro-3D: A Physical Design Methodology for Face-to-Face-Stacked Heterogeneous 3D ICs.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020
Automated Toolchain for Enhanced Productivity in Reconfigurable Multi-accelerator Systems.
Proceedings of the Applied Reconfigurable Computing. Architectures, Tools, and Applications, 2020
2019
Coding-Based Low-Power Through-Silicon-Via Redundancy Schemes for Heterogeneous 3-D SoCs.
IEEE Trans. Very Large Scale Integr. Syst., 2019
IEEE Micro, 2019
Comparing vertical and horizontal SIMD vector processor architectures for accelerated image feature extraction.
J. Syst. Archit., 2019
IEEE Internet Things J., 2019
Integr., 2019
Simulation environment for link energy estimation in networks-on-chip with virtual channels.
Integr., 2019
Integr., 2019
Crosstalk optimization for through-silicon vias by exploiting temporal signal misalignment.
Integr., 2019
Ratatoskr: An open-source framework for in-depth power, performance and area analysis in 3D NoCs.
CoRR, 2019
NoCs in Heterogeneous 3D SoCs: Co-Design of Routing Strategies and Microarchitectures.
IEEE Access, 2019
DRACON: A Dedicated Hardware Infrastructure for Scalable Run-Time Management on Many-Core Systems.
IEEE Access, 2019
Proceedings of the 14th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, 2019
Proceedings of the 14th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, 2019
Proceedings of the 29th International Symposium on Power and Timing Modeling, 2019
Proceedings of the 8th International Conference on Modern Circuits and Systems Technologies, 2019
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
Hardware Acceleration of Kalman Filter for Leak Detection in Water Pipeline Systems using Wireless Sensor Network.
Proceedings of the 17th International Conference on High Performance Computing & Simulation, 2019
Proceedings of the 37th IEEE International Conference on Computer Design, 2019
Proceedings of the 2019 International Conference on Embedded Wireless Systems and Networks, 2019
Proceedings of the 24th IEEE European Test Symposium, 2019
Proceedings of the Mission-Oriented Sensor Networks and Systems: Art and Science, 2019
2018
Systematic Design of an Approximate Adder: The Optimized Lower Part Constant-OR Adder.
IEEE Trans. Very Large Scale Integr. Syst., 2018
A Runtime-Scalable and Hardware-Accelerated Approach to On-Board Linear Unmixing of Hyperspectral Images.
Remote. Sens., 2018
Integr., 2018
IEEE J. Emerg. Sel. Topics Circuits Syst., 2018
The Agamid design-space exploration framework - Task-accurate simulation of hardware-enhanced run-time management for many-core.
Des. Autom. Embed. Syst., 2018
Comput. Networks, 2018
Proceedings of the 13th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, 2018
Exploiting Temporal Misalignment to Optimize the Interconnect Performance for 3D Integration.
Proceedings of the 28th International Symposium on Power and Timing Modeling, 2018
Coding-aware Link Energy Estimation for 2D and 3D Networks-on-Chip with Virtual Channels.
Proceedings of the 28th International Symposium on Power and Timing Modeling, 2018
Proceedings of the 7th International Conference on Modern Circuits and Systems Technologies, 2018
Misalignment-aware delay modeling of narrow on-chip interconnects considering variability.
Proceedings of the 7th International Conference on Modern Circuits and Systems Technologies, 2018
Proceedings of the 24th IEEE International Symposium on On-Line Testing And Robust System Design, 2018
Proceedings of the 55th Annual Design Automation Conference, 2018
2017
IEEE Trans. Very Large Scale Integr. Syst., 2017
Area and power savings via asymmetric organization of buffers in 3D-NoCs for heterogeneous 3D-SoCs.
Microprocess. Microsystems, 2017
Proceedings of the 12th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, 2017
Proceedings of the 27th International Symposium on Power and Timing Modeling, 2017
Proceedings of the 27th International Symposium on Power and Timing Modeling, 2017
Proceedings of the 27th International Symposium on Power and Timing Modeling, 2017
Proceedings of the 23rd IEEE International Symposium on On-Line Testing and Robust System Design, 2017
2016
IEEE Trans. Wirel. Commun., 2016
A simulation environment for design space exploration for asymmetric 3D-Network-on-Chip.
Proceedings of the 11th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, 2016
Proceedings of the 11th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, 2016
ERRCA: A buffer-efficient reconfigurable optical Network-on-Chip with permanent-error recognition.
Proceedings of the 11th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, 2016
Proceedings of the 26th International Workshop on Power and Timing Modeling, 2016
Proceedings of the 26th International Workshop on Power and Timing Modeling, 2016
EARNPIPE: A Testbed for Smart Water Pipeline Monitoring Using Wireless Sensor Network.
Proceedings of the Knowledge-Based and Intelligent Information & Engineering Systems: Proceedings of the 20th International Conference KES-2016, 2016
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2016
PKF-ST: A Communication Cost Reduction Scheme Using Spatial and Temporal Correlation for Wireless Sensor Networks.
Proceedings of the International Conference on Embedded Wireless Systems and Networks, 2016
Modeling Optimal Dynamic Scheduling for Energy-Aware Workload Distribution in Wireless Sensor Networks.
Proceedings of the International Conference on Distributed Computing in Sensor Systems, 2016
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016
2015
Transaction Level Analysis for a Clustered and Hardware-Enhanced Task Manager on Homogeneous Many-Core Systems.
CoRR, 2015
Proceedings of the Workshop on High Performance Energy Efficient Embedded Systems (HIP3ES) 2015.
CoRR, 2015
An altruistic compression-scheduling scheme for cluster-based wireless sensor networks.
Proceedings of the 12th Annual IEEE International Conference on Sensing, 2015
Proceedings of the 10th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, 2015
A framework for hardware-based DVFS management in multicore mixed-criticality systems.
Proceedings of the 10th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, 2015
Predictable photonic interconnects using an autonomous channel management and a TDMA-NoC.
Proceedings of the 10th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, 2015
A decentralised, autonomous, and congestion-aware thermal monitoring infrastructure for photonic network-on-chip.
Proceedings of the 10th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, 2015
Area and power savings via buffer reorganization in asymmetric 3D-NoCs for heterogeneous 3D-SoCs.
Proceedings of the Nordic Circuits and Systems Conference, 2015
Proceedings of the 2015 IEEE Computer Society Annual Symposium on VLSI, 2015
The DRACON Embedded Many-Core: Hardware-Enhanced Run-Time Management Using a Network of Dedicated Control Nodes.
Proceedings of the 2015 IEEE Computer Society Annual Symposium on VLSI, 2015
Proceedings of the 25th International Conference on Field Programmable Logic and Applications, 2015
2014
Accurate Energy-Aware Workload Distribution for Wireless Sensor Networks Using a Detailed Communication Energy Cost Model.
J. Low Power Electron., 2014
A coding-based configurable and asymmetrical redundancy scheme for 3-D interconnects.
Proceedings of the 9th International Symposium on Reconfigurable and Communication-Centric Systems-on-Chip, 2014
Proceedings of the 9th International Symposium on Reconfigurable and Communication-Centric Systems-on-Chip, 2014
A transaction-level framework for design-space exploration of hardware-enhanced operating systems.
Proceedings of the 2014 International Symposium on System-on-Chip, 2014
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014
2013
PKF: A communication cost reduction schema based on Kalman filter and data prediction for Wireless Sensor Networks.
Proceedings of the 2013 IEEE International SOC Conference, Erlangen, Germany, 2013
An optimisation algorithm for minimising energy dissipation in NoC-based hard real-time embedded systems.
Proceedings of the 21st International Conference on Real-Time Networks and Systems, 2013
A Scalable Hardware Implementation of a Best-Effort Scheduler for Multicore Processors.
Proceedings of the 2013 Euromicro Conference on Digital System Design, 2013
Proceedings of the 2013 International Conference on Collaboration Technologies and Systems, 2013
2012
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012
2010
Practical and Theoretical Considerations on Low-Power Probability-Codes for Networks-on-Chip.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation, 2010
2009
J. Low Power Electron., 2009
2008
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2008
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008
2007
Signal Activity Analysis for High-Level Power Estimation in Time-Shared Linear Systems.
J. Low Power Electron., 2007
On the Necessity of Combining Coding with Spacing and Shielding for Improving Performance and Power in Very Deep Sub-micron Interconnects.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2007
Proceedings of the 2007 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2007), 2007
2006
Adaptive Coding in Networks-on-Chip: Transition Activity Reduction Versus Power Overhead of the Codec Circuitry.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2006
Partial Bus-Invert Bus Encoding Schemes for Low-Power DSP Systems Considering Inter-wire Capacitance.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2006
Evaluating the Impact of Data Encoding Techniques on the Power Consumption in Networks-on-Chip.
Proceedings of the 2006 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2006), 2006
A high-level compact pattern-dependent delay model for high-speed point-to-point interconnects.
Proceedings of the 2006 International Conference on Computer-Aided Design, 2006
2005
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
2004
Proceedings of the 17th Annual Symposium on Integrated Circuits and Systems Design, 2004
Proceedings of the Integrated Circuit and System Design, 2004
Proceedings of the Integrated Circuit and System Design, 2004
2003
Hardware-Assisted Signal Activity Analysis for Power Estimation in Rapid Prototyped Systems.
Des. Autom. Embed. Syst., 2003
Proceedings of the 16th International Conference on VLSI Design (VLSI Design 2003), 2003
Emulation of Analog Components for the Rapid Prototyping of Wireless Baseband Systems.
Proceedings of the 14th IEEE International Workshop on Rapid System Prototyping (RSP 2003), 2003
Proceedings of the Integrated Circuit and System Design, 2003
Proceedings of the 2003 10th IEEE International Conference on Electronics, 2003
Proceedings of the 2003 International Conference on Computer-Aided Design, 2003
Proceedings of the 2003 IEEE International Conference on Field-Programmable Technology, 2003
Evaluation and Run-Time Optimization of On-chip Communication Structures in Reconfigurable Architectures.
Proceedings of the Field Programmable Logic and Application, 13th International Conference, 2003
2002
Proceedings of the 15th Annual Symposium on Integrated Circuits and Systems Design, 2002
Proceedings of the 13th IEEE International Workshop on Rapid System Prototyping (RSP 2002), 2002
Power Estimation Based on Transition Activity Analysis with an Architecture Precise Rapid Prototyping System.
Proceedings of the 13th IEEE International Workshop on Rapid System Prototyping (RSP 2002), 2002
Proceedings of the 2002 International Symposium on Low Power Electronics and Design, 2002
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002
Proceedings of the 2002 9th IEEE International Conference on Electronics, 2002
Proceedings of the Field-Programmable Logic and Applications, 2002
Proceedings of the 2002 Design, 2002