Dagmar Peters-Drolshagen

According to our database1, Dagmar Peters-Drolshagen authored at least 45 papers between 2013 and 2020.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2020
Parameter Extraction for a Simplified EKV-model in a 28nm FDSOI Technology.
Proceedings of the 27th International Conference on Mixed Design of Integrated Circuits and System, 2020

2019
Charge-Based Model for Reliability Analysis Flow of Flip- Flops under Process Variation and Aging.
Proceedings of the 16th International Conference on Synthesis, 2019

2018
Design for reliability of generic sensor interface circuits.
Microelectron. Reliab., 2018

On-line monitoring and error correction in sensor interface circuits using digital calibration techniques.
Proceedings of the 36th IEEE VLSI Test Symposium, 2018

ReSeMBleD-Methods for Response Surface Model Behavioral Description.
Proceedings of the 15th International Conference on Synthesis, 2018

LUT-Based Stochastic Modeling for Non-Normal Performance Distributions.
Proceedings of the 15th International Conference on Synthesis, 2018

Yield Approximation of Analog Integrated Circuits Under Time-Dependent Variability.
Proceedings of the 15th International Conference on Synthesis, 2018

Topology-Driven Reliability Assessment of Integrated Circuits.
Proceedings of the 25th International Conference "Mixed Design of Integrated Circuits and System", 2018

Comparison of Implementation and Recovery for Multi Channel Compressed Sensing.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

A New Approach to Threshold Voltage Measurements of Transistors.
Proceedings of the 24th IEEE International Symposium on On-Line Testing And Robust System Design, 2018

Reliability-Aware Multi-Vth Domain Digital Design Assessment.
Proceedings of the 21st IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2018

2017
Implications for a Wireless, External Device System to Study Electrocorticography.
Sensors, 2017

Design and Verification of Analog CMOS Circuits Using the <i>g</i> <sub>m</sub>/<i>I</i> <sub>D</sub>-Method with Age-Dependent Degradation Effects.
J. Low Power Electron., 2017

Multi-User Frame Synchronization in Wireless Networks with Sporadic User Activity.
Proceedings of the WSA 2017, 2017

Variation- and degradation-aware stochastic behavioral modeling of analog circuit components.
Proceedings of the 14th International Conference on Synthesis, 2017

Behavioral modeling of a sensor interface circuit including various non-idealities.
Proceedings of the 14th International Conference on Synthesis, 2017

Parametrisable digital design of a sphere decoder with high-level synthesis.
Proceedings of the 25th European Signal Processing Conference, 2017

2016
Analysis of aging effects - From transistor to system level.
Microelectron. Reliab., 2016

Activity and Channel Estimation in Multi-User Wireless Sensor Networks.
Proceedings of the WSA 2016, 2016

Design and verification of analog CMOS circuits using the gm/ID-method with age-dependent degradation effects.
Proceedings of the 26th International Workshop on Power and Timing Modeling, 2016

Degradation and temperature analysis of voltage-controlled ring oscillators for robust and reliable oscillator designs in a 65nm bulk CMOS process.
Proceedings of the 2016 MIXDES, 2016

Parameter identification for behavioral modeling of analog components including degradation.
Proceedings of the 2016 MIXDES, 2016

Hardware-accelerated reconstruction of compressed neural signals based on inpainting.
Proceedings of the 2016 MIXDES, 2016

Stochastic LUT-based reliability-aware design method for operation point dependent CMOS circuits.
Proceedings of the 2016 MIXDES, 2016

Temperature- and aging-resistant inverter for robust and reliable time to digital circuit designs in a 65nm bulk CMOS process.
Proceedings of the 22nd IEEE International Symposium on On-Line Testing and Robust System Design, 2016

Online monitoring of NBTI and HCD in beta-multiplier circuits.
Proceedings of the 22nd IEEE International Symposium on On-Line Testing and Robust System Design, 2016

Efficient and fast SOP-based inpainting for neurological signals in resource limited systems.
Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016

Compression and reconstruction methodology for neural signals based on patch ordering inpainting for brain monitoring.
Proceedings of the 2016 IEEE International Conference on Acoustics, 2016

Rapid digital architecture design of orthogonal matching pursuit.
Proceedings of the 24th European Signal Processing Conference, 2016

Reliability-aware design method for CMOS circuits.
Proceedings of the Workshop on Early Reliability Modeling for Aging and Variability in Silicon Systems, 2016

Fast digital design space exploration with high-level synthesis: A case study with approximate conjugate gradient pursuit.
Proceedings of the 50th Asilomar Conference on Signals, Systems and Computers, 2016

2015
Optimum Operating Points of Transistors with minimal Aging-Aware Sensitivity.
Proceedings of the 28th Symposium on Integrated Circuits and Systems Design, 2015

An aging-aware transistor sizing tool regarding BTI and HCD degradation modes.
Proceedings of the 22nd International Conference Mixed Design of Integrated Circuits & Systems, 2015

NBTI and HCD aware behavioral models for reliability analysis of analog CMOS circuits.
Proceedings of the IEEE International Reliability Physics Symposium, 2015

Variability-aware aging modeling for reliability analysis of an analog neural measurement system.
Proceedings of the 20th IEEE European Test Symposium, 2015

Structure reconstruction of correlated neural signals based on inpainting for brain monitoring.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2015

2014
Power efficient digital IC design for a medical application with high reliability requirements.
Proceedings of the 24th International Workshop on Power and Timing Modeling, 2014

Analog behavioral modeling for age-dependent degradation of complex analog circuits.
Proceedings of the 21st International Conference Mixed Design of Integrated Circuits and Systems, 2014

Exploiting correlation in neural signals for data compression.
Proceedings of the 22nd European Signal Processing Conference, 2014

Compressed sensing K-best detection for sparse multi-user communications.
Proceedings of the 22nd European Signal Processing Conference, 2014

Modeling of an analog recording system design for ECoG and AP signals.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

2013
Variability-aware gradual aging for generating reliability figures of a neural measurement system.
Proceedings of the 20th International Conference Mixed Design of Integrated Circuits and Systems, 2013

Development of a fully implantable recording system for ECoG signals.
Proceedings of the Design, Automation and Test in Europe, 2013

Reliability analysis for integrated circuit amplifiers used in neural measurement systems.
Proceedings of the Design, Automation and Test in Europe, 2013

Joint compression of neural action potentials and local field potentials.
Proceedings of the 2013 Asilomar Conference on Signals, 2013


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