Steffen Paul

Orcid: 0000-0003-3392-0471

According to our database1, Steffen Paul authored at least 150 papers between 1991 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2023
Hybrid SORN Hardware Accelerator for Support Vector Machines.
Proceedings of the Next Generation Arithmetic - 4th International Conference, 2023

Fused Three-Input SORN Arithmetic.
Proceedings of the Next Generation Arithmetic - 4th International Conference, 2023

2022
Towards Dynamic Fault Tolerance for Hardware-Implemented Artificial Neural Networks: A Deep Learning Approach.
CoRR, 2022

Hybrid SORN Implementation of k-Nearest Neighbor Algorithm on FPGA.
Proceedings of the 20th IEEE Interregional NEWCAS Conference, 2022

Improving the Precision of SORN Arithmetic by Introducing Fused Operations.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

On the Implementation of Edge Detection Algorithms with SORN Arithmetic.
Proceedings of the Next Generation Arithmetic - Third International Conference, 2022

2021
Hardware Implementation of a Latency-Reduced Sphere Decoder With SORN Preprocessing.
IEEE Access, 2021

2020
A Hardware Generator for SORN Arithmetic.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

Optical Antennas for Wireless Sensor Network inside the Ariane VEB.
Proceedings of the 8th IEEE International Conference on Wireless for Space and Extreme Environments, 2020

A High-Performance Data Processing Unit for Next Generation Satellite Transceivers.
Proceedings of the 8th IEEE International Conference on Wireless for Space and Extreme Environments, 2020

An Energy Efficient SAR ADC Architecture with DAC Separation.
Proceedings of the 18th IEEE International New Circuits and Systems Conference, 2020

Complexity Reduction for Sphere Decoding using Unum-Type-II-Based SORN-Arithmetic.
Proceedings of the 9th International Conference on Modern Circuits and Systems Technologies, 2020

Parameter Extraction for a Simplified EKV-model in a 28nm FDSOI Technology.
Proceedings of the 27th International Conference on Mixed Design of Integrated Circuits and System, 2020

Application-Specific Analysis of Different SORN Datatypes for Unum Type-2-Based Arithmetic.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

SORN-based Cascade Support Vector Machine.
Proceedings of the 28th European Signal Processing Conference, 2020

Combining Fixed-Point and SORN Arithmetic in a MIMO BPSK-Symbol Detection Architecture.
Proceedings of the 31st IEEE International Conference on Application-specific Systems, 2020

A Novel Approach for Combining Local Estimates for Fully Decentralized Feedforward Massive MIMO Equalization: The Multistep Fusion.
Proceedings of the 54th Asilomar Conference on Signals, Systems, and Computers, 2020

Hardware Architecture of a Decentralized Massive MIMO Equalizer based on Gauss-Seidel Detection.
Proceedings of the 54th Asilomar Conference on Signals, Systems, and Computers, 2020

2019
Compact Extended Industrial Range CMOS Current References.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019

Efficient Initialization of Iterative Linear Massive MIMO Uplink Detectors by Binary Jacobi Synthesis.
Proceedings of the 23rd International ITG Workshop on Smart Antennas, 2019

Parallel Data Reduction Method for an Industrial Massive MIMO Detector using "Tall Skinny QR" Decomposition.
Proceedings of the 23rd International ITG Workshop on Smart Antennas, 2019

Low Power Antenna Design for Free Space Optical Communications inside the Ariane 5 VEB.
Proceedings of the 2019 IEEE International Conference on Wireless for Space and Extreme Environments, 2019

On Blockchain-Based Dynamic Resource Allocation for Concurrent Industrial Wireless Premises Networks.
Proceedings of the 2019 International Conference on Wireless and Mobile Computing, 2019

Charge-Based Model for Reliability Analysis Flow of Flip- Flops under Process Variation and Aging.
Proceedings of the 16th International Conference on Synthesis, 2019

Reliability of an Industrial Wireless Communication System using Approximate Units.
Proceedings of the 29th International Symposium on Power and Timing Modeling, 2019

Two-Step Pipeline SAR ADC with passive Charge Sharing between Cascades.
Proceedings of the 2019 IEEE Nordic Circuits and Systems Conference, 2019

Adaptive Bivariate Function Generation based on Chebyshev-Polynomials.
Proceedings of the 17th IEEE International New Circuits and Systems Conference, 2019

Ultra Low Latency Implementation of Robust Channel Estimation and Equalization for Industrial Wireless Communication Systems.
Proceedings of the 17th IEEE International New Circuits and Systems Conference, 2019

Enhanced Symbol Synchronization for Multi-User High Reliable Dynamic Industrial Wireless Communication.
Proceedings of the 17th IEEE International New Circuits and Systems Conference, 2019

Multi-step capacitor switching scheme for low-power SAR ADC.
Proceedings of the 17th IEEE International New Circuits and Systems Conference, 2019

SORN Arithmetic for MIMO Symbol Detection - Exploration of the Type-2 Unum Format.
Proceedings of the 17th IEEE International New Circuits and Systems Conference, 2019

First Order Fully Passive Noise-Shaping SAR ADC Architecture with NTF Zero close to One.
Proceedings of the 17th IEEE International New Circuits and Systems Conference, 2019

Low-Complexity 2-Coordinates Descent for Near-Optimal MMSE Soft-Output Massive MIMO Uplink Data Detection.
Proceedings of the 27th European Signal Processing Conference, 2019

Decentralized Massive MIMO Uplink Signal Estimation by Binary Multistep Synthesis.
Proceedings of the 53rd Asilomar Conference on Signals, Systems, and Computers, 2019

FPGA Prototyping of a High-Resolution TerraSAR-X Image Processor for Iceberg Detection.
Proceedings of the 53rd Asilomar Conference on Signals, Systems, and Computers, 2019

2018
Design for reliability of generic sensor interface circuits.
Microelectron. Reliab., 2018

Optical Communications for Space Applications: Modulation Techniques for a Sensor Network.
Proceedings of the 6th IEEE International Conference on Wireless for Space and Extreme Environments, 2018

On-line monitoring and error correction in sensor interface circuits using digital calibration techniques.
Proceedings of the 36th IEEE VLSI Test Symposium, 2018

ReSeMBleD-Methods for Response Surface Model Behavioral Description.
Proceedings of the 15th International Conference on Synthesis, 2018

LUT-Based Stochastic Modeling for Non-Normal Performance Distributions.
Proceedings of the 15th International Conference on Synthesis, 2018

Yield Approximation of Analog Integrated Circuits Under Time-Dependent Variability.
Proceedings of the 15th International Conference on Synthesis, 2018

Flying-Capacitor Bottom-Plate Sampling Scheme for Low-Power High-Resolution SAR ADCs.
Proceedings of the 2018 IEEE Nordic Circuits and Systems Conference, 2018

Topology-Driven Reliability Assessment of Integrated Circuits.
Proceedings of the 25th International Conference "Mixed Design of Integrated Circuits and System", 2018

Random Subsampling based Signal Detection for Spatial Correlated Massive MIMO Channels.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

Comparison of Implementation and Recovery for Multi Channel Compressed Sensing.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

A New Approach to Threshold Voltage Measurements of Transistors.
Proceedings of the 24th IEEE International Symposium on On-Line Testing And Robust System Design, 2018

FPGA-based Baseband Solution for High Performance Industrial Wireless Communication.
Proceedings of the 23rd IEEE International Conference on Digital Signal Processing, 2018

Reliability-Aware Multi-Vth Domain Digital Design Assessment.
Proceedings of the 21st IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2018

Energy-Efficient Architecture for Neural Spikes Acquisition.
Proceedings of the 2018 IEEE Biomedical Circuits and Systems Conference, 2018

Hardware Implementation of Basic Arithmetics and Elementary Functions for Unum Computing.
Proceedings of the 52nd Asilomar Conference on Signals, Systems, and Computers, 2018

2017
Hardware-Efficient QR-Decomposition Using Bivariate Numeric Function Approximation.
IEEE Trans. Circuits Syst. I Regul. Pap., 2017

Temperature-Compensated β-Multiplier Current Reference Circuit.
IEEE Trans. Circuits Syst. II Express Briefs, 2017

Implications for a Wireless, External Device System to Study Electrocorticography.
Sensors, 2017

Approximate computing of two-variable numeric functions using multiplier-less gradients.
Microprocess. Microsystems, 2017

Design and Verification of Analog CMOS Circuits Using the <i>g</i> <sub>m</sub>/<i>I</i> <sub>D</sub>-Method with Age-Dependent Degradation Effects.
J. Low Power Electron., 2017

Selected Articles from the 7th International Workshop on CMOS Variability Bremen, Germany, September 21-23, 2016.
J. Low Power Electron., 2017

8-Channel Neural Stimulation ASIC for Epidural Visual Cortex Stimulation.
J. Circuits Syst. Comput., 2017

Multi-User Frame Synchronization in Wireless Networks with Sporadic User Activity.
Proceedings of the WSA 2017, 2017

Variation- and degradation-aware stochastic behavioral modeling of analog circuit components.
Proceedings of the 14th International Conference on Synthesis, 2017

Behavioral modeling of a sensor interface circuit including various non-idealities.
Proceedings of the 14th International Conference on Synthesis, 2017

Two-step monotonic switching scheme for low-power SAR ADCs.
Proceedings of the 15th IEEE International New Circuits and Systems Conference, 2017

Compact first order temperature-compensated CMOS current reference.
Proceedings of the 24th IEEE International Conference on Electronics, Circuits and Systems, 2017

Permuted cubes wavelet thresholding for mask-sensed MRI.
Proceedings of the 22nd International Conference on Digital Signal Processing, 2017

Parametrisable digital design of a sphere decoder with high-level synthesis.
Proceedings of the 25th European Signal Processing Conference, 2017

Neurological activity monitoring based on video inpainting.
Proceedings of the 2017 39th Annual International Conference of the IEEE Engineering in Medicine and Biology Society (EMBC), 2017

Exploiting special-purpose function approximation for hardware-efficient QR-decomposition.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

Simulation-based design procedure for sub 1V CMOS current reference.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

Inpainting makes every sample count.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2017

2016
Analysis of aging effects - From transistor to system level.
Microelectron. Reliab., 2016

Activity and Channel Estimation in Multi-User Wireless Sensor Networks.
Proceedings of the WSA 2016, 2016

Low power ASIC design for infrared sensor network inside ARIANE 5 vehicle equipment bay.
Proceedings of the 2016 IEEE International Conference on Wireless for Space and Extreme Environments, 2016

Design and verification of analog CMOS circuits using the gm/ID-method with age-dependent degradation effects.
Proceedings of the 26th International Workshop on Power and Timing Modeling, 2016

Bivariate function approximation with encoded gradients.
Proceedings of the IEEE Nordic Circuits and Systems Conference, 2016

Current driver with read-out HV protection for neural stimulation.
Proceedings of the IEEE Nordic Circuits and Systems Conference, 2016

Dynamically reconfigurable real-time hardware architecture for channel utilisation analysis in industrial wireless communication.
Proceedings of the IEEE Nordic Circuits and Systems Conference, 2016

Degradation and temperature analysis of voltage-controlled ring oscillators for robust and reliable oscillator designs in a 65nm bulk CMOS process.
Proceedings of the 2016 MIXDES, 2016

Parameter identification for behavioral modeling of analog components including degradation.
Proceedings of the 2016 MIXDES, 2016

Hardware-accelerated reconstruction of compressed neural signals based on inpainting.
Proceedings of the 2016 MIXDES, 2016

Stochastic LUT-based reliability-aware design method for operation point dependent CMOS circuits.
Proceedings of the 2016 MIXDES, 2016

Temperature- and aging-resistant inverter for robust and reliable time to digital circuit designs in a 65nm bulk CMOS process.
Proceedings of the 22nd IEEE International Symposium on On-Line Testing and Robust System Design, 2016

Online monitoring of NBTI and HCD in beta-multiplier circuits.
Proceedings of the 22nd IEEE International Symposium on On-Line Testing and Robust System Design, 2016

Efficient and fast SOP-based inpainting for neurological signals in resource limited systems.
Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016

High-performance bivariate numeric function approximation for hardware-efficient QR-decomposition.
Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016

Compression and reconstruction methodology for neural signals based on patch ordering inpainting for brain monitoring.
Proceedings of the 2016 IEEE International Conference on Acoustics, 2016

High throughput architecture for inpainting-based recovery of correlated neural signals.
Proceedings of the 24th European Signal Processing Conference, 2016

On high-accuracy direct digital frequency synthesis using linear function approximation.
Proceedings of the 24th European Signal Processing Conference, 2016

Rapid digital architecture design of orthogonal matching pursuit.
Proceedings of the 24th European Signal Processing Conference, 2016

8 Channel neural stimulation ASIC for epidural visual cortex stimulation with on board 90 ppm/°C current reference.
Proceedings of the 2016 IEEE 19th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS), 2016

Reliability-aware design method for CMOS circuits.
Proceedings of the Workshop on Early Reliability Modeling for Aging and Variability in Silicon Systems, 2016

Design of a multi-core hardware architecture for consensus-based MIMO detection algorithms.
Proceedings of the 50th Asilomar Conference on Signals, Systems and Computers, 2016

Fast digital design space exploration with high-level synthesis: A case study with approximate conjugate gradient pursuit.
Proceedings of the 50th Asilomar Conference on Signals, Systems and Computers, 2016

2015
Bit-Error-Rate measurement of infrared physical channel using reflection via Multi Layer Insulation inside in ARIANE 5 Vehicle Equipment Bay for wireless sensor network communication.
Proceedings of the 2015 IEEE International Conference on Wireless for Space and Extreme Environments, 2015

Optimum Operating Points of Transistors with minimal Aging-Aware Sensitivity.
Proceedings of the 28th Symposium on Integrated Circuits and Systems Design, 2015

Two-variable numeric function approximation using least-squares-based regression.
Proceedings of the Nordic Circuits and Systems Conference, 2015

A new current stimulator architecture for visual cortex stimulation.
Proceedings of the Nordic Circuits and Systems Conference, 2015

An aging-aware transistor sizing tool regarding BTI and HCD degradation modes.
Proceedings of the 22nd International Conference Mixed Design of Integrated Circuits & Systems, 2015

NBTI and HCD aware behavioral models for reliability analysis of analog CMOS circuits.
Proceedings of the IEEE International Reliability Physics Symposium, 2015

A novel HV-switch scheme with gate-source overvoltage protection for bidirectional neural interfaces.
Proceedings of the 2015 IEEE International Conference on Electronics, 2015

Variability-aware aging modeling for reliability analysis of an analog neural measurement system.
Proceedings of the 20th IEEE European Test Symposium, 2015

Design method for multiplier-less two-variable numeric function approximation.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

QR-decomposition architecture based on two-variable numeric function approximation.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

Structure reconstruction of correlated neural signals based on inpainting for brain monitoring.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2015

2014
Analysis and Implementation for Physical-Layer Network Coding with Carrier Frequency Offset.
Proceedings of the WSA 2014, 2014

Power efficient digital IC design for a medical application with high reliability requirements.
Proceedings of the 24th International Workshop on Power and Timing Modeling, 2014

Analog behavioral modeling for age-dependent degradation of complex analog circuits.
Proceedings of the 21st International Conference Mixed Design of Integrated Circuits and Systems, 2014

Exploiting correlation in neural signals for data compression.
Proceedings of the 22nd European Signal Processing Conference, 2014

Compressed sensing K-best detection for sparse multi-user communications.
Proceedings of the 22nd European Signal Processing Conference, 2014

Modeling of an analog recording system design for ECoG and AP signals.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

2013
Multi-User Pre-Processing in Multi-Antenna OFDM TDD Systems with Non-Reciprocal Transceivers.
IEEE Trans. Commun., 2013

Sparsity-Aware Successive Interference Cancellation with Practical Constraints.
Proceedings of the 17th International ITG Workshop on Smart Antennas, 2013

Variability-aware gradual aging for generating reliability figures of a neural measurement system.
Proceedings of the 20th International Conference Mixed Design of Integrated Circuits and Systems, 2013

Low complexity QR-decomposition architecture using the logarithmic number system.
Proceedings of the Design, Automation and Test in Europe, 2013

Development of a fully implantable recording system for ECoG signals.
Proceedings of the Design, Automation and Test in Europe, 2013

Reliability analysis for integrated circuit amplifiers used in neural measurement systems.
Proceedings of the Design, Automation and Test in Europe, 2013

Joint compression of neural action potentials and local field potentials.
Proceedings of the 2013 Asilomar Conference on Signals, 2013

2012
Model for energy optimization of baseband architectures in wireless communications.
Proceedings of the International ITG Workshop on Smart Antennas, 2012

An improved inter-relay cooperation scheme for distributed relaying networks.
Proceedings of the International ITG Workshop on Smart Antennas, 2012

Reconfigurable architecture of a hybrid synchronisation algorithm for LTE.
Proceedings of the 23rd IEEE International Symposium on Personal, 2012

Design and implementation of a neurocomputing ASIP for environmental monitoring in WSN.
Proceedings of the 19th IEEE International Conference on Electronics, Circuits and Systems, 2012

Reduced Complexity Computation Unit for a Sphere Decoding Algorithm.
Proceedings of the European Wireless 2012, 2012

Design and implementation of alow complexity NCO based CFO compensation unit.
Proceedings of the 20th European Signal Processing Conference, 2012

A Direct Digital Frequency Synthesizer based on automatic nonuniform piecewise function generation.
Proceedings of the 20th European Signal Processing Conference, 2012

Low-complexity and approximative sphere decoding of sparse signals.
Proceedings of the Conference Record of the Forty Sixth Asilomar Conference on Signals, 2012

2011
Modified Partial Euclidean Distance for iterative tree-search MIMO detection.
Proceedings of the IEEE 22nd International Symposium on Personal, 2011

A High Performance Neurocomputing Algorithm for Prediction Tasks in Wireless Sensor Networks.
Proceedings of the 4th IFIP International Conference on New Technologies, 2011

Energy-aware design of inter-relay cooperation for distributed relaying networks.
Proceedings of the 8th International Symposium on Wireless Communication Systems, 2011

Collaborative communication control based on sensor data management in WSN.
Proceedings of the 14th International Conference on Information Fusion, 2011

Implementation of a Low Power Low Complexity ASIP for various Sphere Decoding Algorithms.
Proceedings of the European Wireless 2011, April 27-29, 2011, Vienna, Austria., 2011

Architecture and FPGA-implementation of a high throughput K<sup>+</sup>-Best detector.
Proceedings of the Design, Automation and Test in Europe, 2011

Efficient FPGA implementation of a High throughput systolic array QR-decomposition algorithm.
Proceedings of the Conference Record of the Forty Fifth Asilomar Conference on Signals, 2011

2010
Implementation of an SDFG based parallel depth-first complex sphere decoding algorithm.
Proceedings of the 2010 International ITG Workshop on Smart Antennas, 2010

Synchronization aspects while using reciprocity for precoding in MIMO-OFDM.
Proceedings of the 2010 International ITG Workshop on Smart Antennas, 2010

Evaluation of the root mean square error performance of the PAST-Consensus algorithm.
Proceedings of the 2010 International ITG Workshop on Smart Antennas, 2010

2007
An effective method for state-of-charge estimation in wireless sensor networks.
Proceedings of the 5th International Conference on Embedded Networked Sensor Systems, 2007

Baseband Signal Processing.
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007

2005
On estimating the signal to noise ratio from BPSK signals.
Proceedings of the 2005 IEEE International Conference on Acoustics, 2005

An exemplary comparison of Per Antenna Rate Control based MIMO-HSDPA receivers.
Proceedings of the 13th European Signal Processing Conference, 2005

2004
Two-stage space-time receiver for UMTS frequency division duplex.
Proceedings of the 2004 ITG Workshop on Smart Antennas, 2004

2001
Analysis and compensation of the bitline multiplexer in SRAM current sense amplifiers.
IEEE J. Solid State Circuits, 2001

Memory built-in self-repair using redundant words.
Proceedings of the Proceedings IEEE International Test Conference 2001, Baltimore, MD, USA, 30 October, 2001

1997
Algorithm design for structured systems: application to pole placement.
Proceedings of the 1997 IEEE International Conference on Acoustics, 1997

1995
Error Analysis of CORDIC-Based Jacobi Algorithms.
IEEE Trans. Computers, 1995

1994
On the Geometrical Structure of Network Equations.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994

Computation of the real Schur decomposition of nonsymmetric matrices and its hardware implementation.
Proceedings of ICASSP '94: IEEE International Conference on Acoustics, 1994

1993
Spezielle nichtlineare verlustlose Systeme für die analoge Signalverarbeitung.
PhD thesis, 1993

An Efficient Jacobi-like Algorithm for Parallel Eigenvalue Computation.
IEEE Trans. Computers, 1993

Models for nonlinear transmission lines.
Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993

A CORDIC-based Jacobi-like algorithm for eigenvalue computation.
Proceedings of the IEEE International Conference on Acoustics, 1993

1992
Analog median filtering.
Proceedings of the 1992 IEEE International Conference on Acoustics, 1992

1991
Analog Circuits Solving Problems from Linear Algebra.
Proceedings of the Physik und Informatik, 1991


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