Jongjae Ryu

According to our database, Jongjae Ryu authored at least 2 papers between 2008 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of five.

2024

A 45-fsrms Accumulated Jitter PLL Using Advanced Design Techniques for PCIe Gen6 Reference Clock Generation in 2 nm MBCFET Technology.

Subhadeep Datta, Arnab Banerjee, Ayush Tripathi, Dongmin Kang, Leesunghyuck, Hasung Lim, Wonsik Yu, Kgj Vishnu, Chanyoung Jeong, Sumanth Chakkirala, Avneesh Singh Verma, Sachin Kashyap, Eg Jeevarathinam, Sunil Kumar Pandey, Jongjae Ryu, Sanjeeb Kumar Ghosh

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2024

2008

A 65nm 3.4Gbps HDMI TX PHY with supply-regulated dual-tuning PLL and blending multiplexer.

Jongshin Shin, Jaehyun Park, Bongjin Kim, Jongjae Ryu, Chiwon Kim, Jiyoung Kim, Seung-Hee Yang, Hyungoo Kim, Jaewhui Kim

Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008