Joodong Park

According to our database, Joodong Park authored at least 3 papers between 2014 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2024

A Three Dimensional DRAM (3D DRAM) Technology for the Next Decades.

K. S. Choi, S. H. Kim, J. W. Seo, H. S. Kang, Seung Wan Chu, S. W. Bae, J. H. Kwon, G. S. Kim, Y. T. Park, J. H. Kwak, D. I. Song, S. M. Park, Y. T. Kim, K. C. Jang, J. S. Cho, H. S. Lee, B. H. Lee, J. W. Park, J. H. Lee, H. H. Kwon, D. S. You, C. S. Hyun, J. J. Lee, S. C. Lee, I. D. Kim, J. H. Myung, H. S. Won, J. H. Chun, K. H. Kim, J. H. Kang, S. B. Kim, K. H. Lee, S. O. Chung, S. S. Kim, I. S. Jin, B. K. Lee, C. W. Kim, Joodong Park, S. Y. Cha

Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024

2015

A 1 Gb 2 GHz 128 GB/s Bandwidth Embedded DRAM in 22 nm Tri-Gate CMOS Technology.

Fatih Hamzaoglu, Umut Arslan, Nabhendra Bisnik, Swaroop Ghosh, Manoj B. Lal, Nick Lindert, Mesut Meterelliyoz, Randy B. Osborne, Joodong Park, Shigeki Tomishima, Yih Wang, Kevin Zhang

IEEE J. Solid State Circuits, 2015

2014

13.1 A 1Gb 2GHz embedded DRAM in 22nm tri-gate CMOS technology.

Fatih Hamzaoglu, Umut Arslan, Nabhendra Bisnik, Swaroop Ghosh, Manoj B. Lal, Nick Lindert, Mesut Meterelliyoz, Randy B. Osborne, Joodong Park, Shigeki Tomishima, Yih Wang, Kevin Zhang

Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014