Jorge H. Meza Escobar

Affiliations:
  • Ilmenau University of Technology, Germany


According to our database1, Jorge H. Meza Escobar authored at least 8 papers between 2011 and 2017.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2017
Towards an embedded board-level tester: study of a configurable test processor.
PhD thesis, 2017

2016
A Configurable Test-Processor for Board-Level Testing.
Proceedings of the 2016 Euromicro Conference on Digital System Design, 2016

2014
Automated Design Error Localization in RTL Designs.
IEEE Des. Test, 2014

Modeling timing constraints for automatic generation of embedded test instruments.
Proceedings of the 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2014

2013
ISA configurability of an FPGA test-processor used for board-level interconnection testing.
Proceedings of the 14th Latin American Test Workshop, 2013

2012
Localization of Bugs in Processor Designs Using zamiaCAD Framework.
Proceedings of the 13th International Workshop on Microprocessor Test and Verification, 2012

Automatic generation of an FPGA based embedded test system for printed circuit board testing.
Proceedings of the 13th Latin American Test Workshop, 2012

2011
Architecture of an Adaptive Test System Built on FPGAs.
Proceedings of the Architecture of Computing Systems - ARCS 2011, 2011


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