José Ignacio Benavides Benítez

According to our database1, José Ignacio Benavides Benítez authored at least 26 papers between 1990 and 2013.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

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Bibliography

2013
Performance Modeling of Atomic Additions on GPU Scratchpad Memory.
IEEE Trans. Parallel Distrib. Syst., 2013

An optimized approach to histogram computation on GPU.
Mach. Vis. Appl., 2013

2012
Performance models for asynchronous data transfers on consumer Graphics Processing Units.
J. Parallel Distrib. Comput., 2012

Optimizing the physical implementation of a reconfigurable cache.
Proceedings of the 2012 International Conference on Reconfigurable Computing and FPGAs, 2012

2011
Load Balancing versus Occupancy Maximization on Graphics Processing Units: The Generalized Hough Transform as a Case Study.
IJHPCA, 2011

simARQ, An Automatic Repeat Request Simulator for Teaching Purposes.
Proceedings of the IT Revolutions, 2011

Egomotion compensation and moving objects detection algorithm on GPU.
Proceedings of the Applications, Tools and Techniques on the Road to Exascale Computing, Proceedings of the conference ParCo 2011, 31 August, 2011

2010
Concurrent Calculations on Reconfigurable Logic Devices Applied to the Analysis of Video Images.
Int. J. Reconfig. Comp., 2010

Reconfigurable Cache Implemented on an FPGA.
Proceedings of the ReConFig'10: 2010 International Conference on Reconfigurable Computing and FPGAs, 2010

2009
MESI Cache Coherence Simulator for Teaching Purposes.
CLEI Electron. J., 2009

FPGA Implementation of the Generalized Hough Transform.
Proceedings of the ReConFig'09: 2009 International Conference on Reconfigurable Computing and FPGAs, 2009

Parallelization of a Video Segmentation Algorithm on CUDA-Enabled Graphics Processing Units.
Proceedings of the Euro-Par 2009 Parallel Processing, 2009

2008
Teaching the Cache Memory System Using a Reconfigurable Approach.
IEEE Trans. Education, 2008

Developing an MMX Extension for the MicroBlaze Soft Processor.
Proceedings of the ReConFig'08: 2008 International Conference on Reconfigurable Computing and FPGAs, 2008

2007
A New Parallel Sorting Algorithm based on Odd-Even Mergesort.
Proceedings of the 15th Euromicro International Conference on Parallel, 2007

Simulating a Reconfigurable Cache System for Teaching Purposes.
Proceedings of the IEEE International Conference on Microelectronic Systems Education, 2007

2006
SAD computation based on online arithmetic for motion estimation.
Microprocessors and Microsystems, 2006

Fast Full-Search Block Matching Algorithm Motion Estimation Alternatives in FPGA.
Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), 2006

2005
Distributed Architecture System for Computer Performance Testing.
Proceedings of the Parallel Processing and Applied Mathematics, 2005

2004
Reliable real time scene change detection in MPEG compressed video.
Proceedings of the 2004 IEEE International Conference on Multimedia and Expo, 2004

Combining luminance and edge based metrics for robust temporal video segmentation.
Proceedings of the 2004 International Conference on Image Processing, 2004

Minimum Sum of Absolute Differences Implementation in a Single FPGA Device.
Proceedings of the Field Programmable Logic and Application, 2004

2003
Global motion estimation algorithm for video segmentation.
Proceedings of the Visual Communications and Image Processing 2003, 2003

1997
Parallel Rendering of Radiance on Distributed Memory System by PVM.
Proceedings of the Recent Advances in Parallel Virtual Machine and Message Passing Interface, 1997

1992
Image reconstruction on hypercube computers: Application to electron microscopy.
Signal Processing, 1992

1990
Image template matching on hypercube SIMD computers.
Signal Processing, 1990


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