Ricardo Quislant

Sonia Gonzalez-Navarro

J. Comput. Sci., 2022

Accelerating Time Series Analysis via Processing using Non-Volatile Memories.

[BibT_eX]

[DOI]

CoRR, 2022

Exploiting Vector Extennsions to Accelerate Time Series Analysis.

[BibT_eX]

[DOI]

Proceedings of the 30th Euromicro International Conference on Parallel, 2022

Exploiting Near-Data Processing to Accelerate Time Series Analysis.

[BibT_eX]

[DOI]

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2022

2020

Energy-Efficient Time Series Analysis Using Transprecision Computing.

[BibT_eX]

[DOI]

Proceedings of the 32nd IEEE International Symposium on Computer Architecture and High Performance Computing, 2020

NATSA: A Near-Data Processing Accelerator for Time Series Analysis.

[BibT_eX]

[DOI]

Proceedings of the 38th IEEE International Conference on Computer Design, 2020

2019

Improving hardware transactional memory parallelization of computational geometry algorithms using privatizing transactions.

[BibT_eX]

[DOI]

J. Parallel Distributed Comput., 2019

2018

Privatizing transactions for Lee's algorithm in commercial hardware transactional memory.

[BibT_eX]

[DOI]

J. Supercomput., 2018

2017

Lazy Irrevocability for Best-Effort Transactional Memory Systems.

[BibT_eX]

[DOI]

IEEE Trans. Parallel Distributed Syst., 2017

Leveraging irrevocability to deal with signature saturation in hardware transactional memory.

[BibT_eX]

[DOI]

J. Supercomput., 2017

Enhancing scalability in best-effort hardware transactional memory systems.

[BibT_eX]

[DOI]

J. Parallel Distributed Comput., 2017

2016

Insights into the Fallback Path of Best-Effort Hardware Transactional Memory Systems.

[BibT_eX]

[DOI]

Proceedings of the Euro-Par 2016: Parallel Processing, 2016

2015

Conflict Detection in Hardware Transactional Memory.

[BibT_eX]

[DOI]

Proceedings of the Transactional Memory. Foundations, Algorithms, Tools, and Applications, 2015

2014

Improving Signature Behavior by Irrevocability in Transactional Memory Systems.

[BibT_eX]

[DOI]

Proceedings of the 26th IEEE International Symposium on Computer Architecture and High Performance Computing, 2014

Scalability Analysis of Signatures in Transactional Memory Systems.

[BibT_eX]

[DOI]

Proceedings of the 26th IEEE International Symposium on Computer Architecture and High Performance Computing, 2014

2013

Hardware Signature Designs to Deal with Asymmetry in Transactional Data Sets.

[BibT_eX]

[DOI]

IEEE Trans. Parallel Distributed Syst., 2013

LS-Sig: Locality-Sensitive Signatures for Transactional Memory.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2013

Dealing with Reduction Operations Using Transactional Memory.

[BibT_eX]

[DOI]

Miguel A. Gonzalez-Mesa

Proceedings of the 25th International Symposium on Computer Architecture and High Performance Computing, 2013

Exploring Irregular Reduction Support in Transactional Memory.

[BibT_eX]

[DOI]

Miguel A. Gonzalez-Mesa

Proceedings of the Algorithms and Architectures for Parallel Processing, 2013

2011

Multiset signatures for transactional memory.

[BibT_eX]

[DOI]

Proceedings of the 25th International Conference on Supercomputing, 2011, Tucson, AZ, USA, May 31, 2011

Unified Locality-Sensitive Signatures for Transactional Memory.

[BibT_eX]

[DOI]

Proceedings of the Euro-Par 2011 Parallel Processing - 17th International Conference, 2011

2010

Interval Filter: A Locality-Aware Alternative to Bloom Filters for Hardware Membership Queries by Interval Classification.

[BibT_eX]

[DOI]

Proceedings of the Intelligent Data Engineering and Automated Learning, 2010

2009

Improving Signatures by Locality Exploitation for Transactional Memory.

[BibT_eX]

[DOI]

Proceedings of the PACT 2009, 2009

2008

Teaching the Cache Memory System Using a Reconfigurable Approach.

[BibT_eX]

[DOI]

Ezequiel Herruzo

José Ignacio Benavides

Emilio L. Zapata

IEEE Trans. Educ., 2008

2007

Simulating a Reconfigurable Cache System for Teaching Purposes.

[BibT_eX]

[DOI]

Ezequiel Herruzo

José Ignacio Benavides

Emilio L. Zapata