José Ignacio Martínez

According to our database, José Ignacio Martínez authored at least 16 papers between 2005 and 2021.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2021

Toward Accelerated Training of Parallel Support Vector Machines Based on Voronoi Diagrams.

César Alfaro, Javier Gómez, Javier M. Moguerza, Javier Castillo, José Ignacio Martínez

Entropy, 2021

2011

Genetic Algorithm for Boolean minimization in an FPGA cluster.

César Pedraza, Javier Castillo, José Ignacio Martínez, Pablo Huerta, José Luis Bosque, Javier Cano

J. Supercomput., 2011

TCEMC: A co-design flow for application-specific multicores.

Pekka Jääskeläinen, Erno Salminen, Carlos S. de La Lama, Jarmo Takala, José Ignacio Martínez

Proceedings of the 2011 International Conference on Embedded Computer Systems: Architectures, 2011

A Key Size Configurable High Speed RSA Coprocessor.

Emilio Castillo, Javier Castillo, Javier Cano, Pablo Huerta, José Ignacio Martínez

Proceedings of the IEEE 19th Annual International Symposium on Field-Programmable Custom Computing Machines, 2011

2010

Content-based image retrieval algorithm acceleration in a low-cost reconfigurable FPGA cluster.

César Pedraza, Emilio Castillo, Javier Castillo, José Luis Bosque, José Ignacio Martínez, Oscar David Robles, Javier Cano, Pablo Huerta

J. Syst. Archit., 2010

Customized Exposed Datapath Soft-Core Design Flow with Compiler Support.

Otto Esko, Pekka Jääskeläinen, Pablo Huerta, Carlos S. de La Lama, Jarmo Takala, José Ignacio Martínez

Proceedings of the International Conference on Field Programmable Logic and Applications, 2010

2009

Symmetric Multiprocessor Systems on FPGA.

Pablo Huerta, Javier Castillo, César Pedraza, Javier Cano, José Ignacio Martínez

Proceedings of the ReConFig'09: 2009 International Conference on Reconfigurable Computing and FPGAs, 2009

Speeding up combinational synthesis in an FPGA cluster.

César Pedraza, Javier Castillo, José Ignacio Martínez, Pablo Huerta, José Luis Bosque, Javier Cano

Proceedings of the Parallel Computing: From Multicores and GPU's to Petascale, 2009

Hardware accelerated montecarlo financial simulation over low cost FPGA cluster.

Javier Castillo, José Luis Bosque, Emilio Castillo, Pablo Huerta, José Ignacio Martínez

Proceedings of the 23rd IEEE International Symposium on Parallel and Distributed Processing, 2009

2008

Self-reconfigurable secure file system for embedded Linux.

César Pedraza, Javier Castillo, José Ignacio Martínez, Pablo Huerta, Carlos S. de La Lama

IET Comput. Digit. Tech., 2008

Operating System for Symmetric Multiprocessors on FPGA.

Pablo Huerta, Javier Castillo, Carlos Sanchez, José Ignacio Martínez

Proceedings of the ReConFig'08: 2008 International Conference on Reconfigurable Computing and FPGAs, 2008

Cluster architecture based on low cost reconfigurable hardware.

César Pedraza, Emilio Castillo, Javier Castillo, Cristobal Camarero, José Luis Bosque, José Ignacio Martínez, Rafael Menéndez de Llano

Proceedings of the FPL 2008, 2008

SMILE: Scientific Parallel Multiprocessing based on Low-Cost Reconfigurable Hardware.

Emilio Castillo, César Pedraza, Javier Castillo, Cristobal Camarero, José Luis Bosque, Rafael Menéndez de Llano, José Ignacio Martínez

Proceedings of the 16th IEEE International Symposium on Field-Programmable Custom Computing Machines, 2008

2007

Secure IP downloading for SRAM FPGAs.

Javier Castillo, Pablo Huerta, José Ignacio Martínez

Microprocess. Microsystems, 2007

2006

A Self-Reconfigurable Multimedia Player on FPGA.

Javier Castillo, Pablo Huerta, César Pedraza, José Ignacio Martínez

Proceedings of the 2006 IEEE International Conference on Reconfigurable Computing and FPGA's, 2006

2005

A secure self-reconfiguring architecture based on open-source hardware.

Javier Castillo, Pablo Huerta, Víctor López, José Ignacio Martínez

Proceedings of the 2005 International Conference on Reconfigurable Computing and FPGAs, 2005