Pekka Jääskeläinen

According to our database, Pekka Jääskeläinen authored at least 118 papers between 2006 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

Energy-Efficient Exposed Datapath Architecture With a RISC-V Instruction Set Mode.

Kari Hepola, Joonas Multanen, Pekka Jääskeläinen

IEEE Trans. Computers, February, 2024

Hierarchical Bitmask Implicit Grids for Efficient Point-in-Volume Queries on the GPU.

Julius Ikkala, Tuomas Lauttia, Pekka Jääskeläinen, Markku J. Mäkitalo

Proceedings of the 19th International Joint Conference on Computer Vision, 2024

Towards Efficient OpenCL Pipe Specification for Hardware Accelerators.

Topi Leppänen, Joonas Multanen, Leevi Leppänen, Pekka Jääskeläinen

Proceedings of the 12th International Workshop on OpenCL and SYCL, 2024

2023

AEx: Automated High-Level Synthesis of Compiler Programmable Co-Processors.

Alex Hirvonen, Topi Leppänen, Kari Hepola, Joonas Multanen, Joost Hoozemans, Pekka Jääskeläinen

J. Signal Process. Syst., September, 2023

Efficient OpenCL system integration of non-blocking FPGA accelerators.

Topi Leppänen, Atro Lotvonen, Panagiotis Mousouliotis, Joonas Multanen, Georgios Keramidas, Pekka Jääskeläinen

Microprocess. Microsystems, March, 2023

PoCL-R: An Open Standard Based Offloading Layer for Heterogeneous Multi-Access Edge Computing with Server Side Scalability.

Jan Solanti, Michal Babej, Julius Ikkala, Pekka Jääskeläinen

CoRR, 2023

TauBench 1.1: A Dynamic Benchmark for Graphics Rendering.

Erfan Momeni Yazdi, Markku J. Mäkitalo, Julius Ikkala, Pekka Jääskeläinen

CoRR, 2023

AFOCL: Portable OpenCL Programming of FPGAs via Automated Built-in Kernel Management.

Topi Leppänen, Joonas Multanen, Leevi Leppänen, Pekka Jääskeläinen

Proceedings of the IEEE Nordic Circuits and Systems Conference, 2023

Open Standard Software Stack for Low Latency Offloading from Lightweight Devices to Remote Heterogeneous Platforms.

Jan Solanti, Topi Leppänen, Pekka Jääskeläinen

Proceedings of the 2023 International Workshop on OpenCL, 2023

BrainTTA: A 28.6 TOPS/W Compiler Programmable Transport-Triggered NN SoC.

Maarten J. Molendijk, Floran A. M. de Putter, Manil Dev Gomony, Pekka Jääskeläinen, Henk Corporaal

Proceedings of the 41st IEEE International Conference on Computer Design, 2023

On the OpenCL Support for Streaming Fixed-Function Accelerators on Embedded SoC FPGAs.

Panagiotis Mousouliotis, Topi Leppänen, Pekka Jääskeläinen, Nikos Petrellis, Panagiotis Christakos, Georgios Keramidas, Christos P. Antonopoulos, Nikolaos S. Voros

Proceedings of the Applied Reconfigurable Computing. Architectures, Tools, and Applications, 2023

2022

Image and Video Coding Techniques for Ultra-low Latency.

Jakub Zádník, Markku J. Mäkitalo, Jarno Vanne, Pekka Jääskeläinen

ACM Comput. Surv., January, 2022

Energy-Efficient Instruction Delivery in Embedded Systems With Domain Wall Memory.

Joonas Multanen, Kari Hepola, Asif Ali Khan, Jerónimo Castrillón, Pekka Jääskeläinen

IEEE Trans. Computers, 2022

Cross-vendor programming abstraction for diverse heterogeneous platforms.

Topi Leppänen, Atro Lotvonen, Pekka Jääskeläinen

Frontiers Comput. Sci., 2022

BrainTTA: A 35 fJ/op Compiler Programmable Mixed-Precision Transport-Triggered NN SoC.

Maarten Molendijk, Floran de Putter, Manil Dev Gomony, Pekka Jääskeläinen, Henk Corporaal

CoRR, 2022

Real-Time Rendering of Point Clouds With Photorealistic Effects: A Survey.

Petrus E. J. Kivi, Markku J. Mäkitalo, Jakub Zádník, Julius Ikkala, Vinod Kumar Malamal Vadakital, Pekka Jääskeläinen

IEEE Access, 2022

Tauray: A Scalable Real-Time Open-Source Path Tracer for Stereo and Light Field Displays.

Julius Ikkala, Markku J. Mäkitalo, Tuomas Lauttia, Erwan Leria, Pekka Jääskeläinen

Proceedings of the SIGGRAPH Asia 2022 Technical Communications, 2022

Pruned Lightweight Encoders for Computer Vision.

Jakub Zádník, Markku J. Mäkitalo, Pekka Jääskeläinen

Proceedings of the 24th IEEE International Workshop on Multimedia Signal Processing, 2022

TauBench: Dynamic Benchmark for Graphics Rendering.

Joel Alanko, Markku J. Mäkitalo, Pekka Jääskeläinen

Proceedings of the 17th International Joint Conference on Computer Vision, 2022

Prebypass: Software Register File Bypassing for Reduced Interconnection Architectures.

Kanishkan Vadivel, Barry de Bruin, Roel Jordans, Henk Corporaal, Pekka Jääskeläinen

Proceedings of the 25th Euromicro Conference on Digital System Design, 2022

Real-Time Light Field Path Tracing.

Markku J. Mäkitalo, Erwan Leria, Julius Ikkala, Pekka Jääskeläinen

Proceedings of the Advances in Computer Graphics, 2022

OpenASIP 2.0: Co-Design Toolset for RISC-V Application-Specific Instruction-Set Processors.

Kari Hepola, Joonas Multanen, Pekka Jääskeläinen

Proceedings of the 33rd IEEE International Conference on Application-specific Systems, 2022

Dual-IS: Instruction Set Modality for Efficient Instruction Level Parallelism.

Kari Hepola, Joonas Multanen, Pekka Jääskeläinen

Proceedings of the Architecture of Computing Systems - 35th International Conference, 2022

2021

Design and management of image processing pipelines within CPS: Acquired experience towards the end of the FitOptiVis ECSEL Project.

Carlo Sau, Claudia Rinaldi, Luigi Pomante, Francesca Palumbo, Giacomo Valente, Tiziana Fanni, Marcos Martinez de Alejandro, Frank van der Linden, Twan Basten, Marc Geilen, Geran Peeren, Jirí Kadlec, Pekka Jääskeläinen, Lubomír Bulej, Francisco Barranco, Jukka Saarinen, Tero Säntti, Maria Katiuscia Zedda, Victor Sanchez, Shayan Tabatabaei Nikkhah, Dip Goswami, Guillermo Amat, Lukás Marsík, Mark van Helvoort, Luis Medina, Zaid Al-Ars, Ad de Beer

Microprocess. Microsystems, November, 2021

Evaluation of Different Processor Architecture Organizations for On-Site Electronics in Harsh Environments.

Sven Gesper, Moritz Weißbrich, Tobias Stuckenberg, Pekka Jääskeläinen, Holger Blume, Guillermo Payá Vayá

Int. J. Parallel Program., 2021

PoCL-R: A Scalable Low Latency Distributed OpenCL Runtime.

Jan Solanti, Michal Babej, Julius Ikkala, Vinod Kumar Malamal Vadakital, Pekka Jääskeläinen

Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2021

Unified OpenCL Integration Methodology for FPGA Designs.

Topi Leppänen, Panagiotis Mousouliotis, Georgios Keramidas, Joonas Multanen, Pekka Jääskeläinen

Proceedings of the IEEE Nordic Circuits and Systems Conference, NorCAS 2021, Oslo, 2021

Energy Efficient Multistandard Decompressor ASIP.

Joost Hoozemans, Kati Tervo, Pekka Jääskeläinen, Zaid Al-Ars

Proceedings of the ICCDE 2021: 7th International Conference on Computing and Data Engineering, Phuket, Thailand, January 15, 2021

Performance of Texture Compression Algorithms in Low-Latency Computer Vision Tasks.

Jakub Zádník, Markku J. Mäkitalo, Jussi Iho, Pekka Jääskeläinen

Proceedings of the 9th European Workshop on Visual Information Processing, 2021

DDISH-GI: Dynamic Distributed Spherical Harmonics Global Illumination.

Julius Ikkala, Petrus E. J. Kivi, Joel Alanko, Markku J. Mäkitalo, Pekka Jääskeläinen

Proceedings of the Advances in Computer Graphics, 2021

2020

Energy Efficient Low Latency Multi-issue Cores for Intelligent Always-On IoT Applications.

Joonas Multanen, Heikki Kultala, Kati Tervo, Pekka Jääskeläinen

J. Signal Process. Syst., 2020

Systematic Evaluation of the Quality Benefits of Spatiotemporal Sample Reprojection in Real-Time Stereoscopic Path Tracing.

Markku J. Mäkitalo, Petrus E. J. Kivi, Pekka Jääskeläinen

IEEE Access, 2020

System Simulation of Memristor Based Computation in Memory Platforms.

Ali BanaGozar, Kanishkan Vadivel, Joonas Multanen, Pekka Jääskeläinen, Sander Stuijk, Henk Corporaal

Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2020

POCL-R: Distributed OpenCL Runtime for Low Latency Remote Offloading.

Jan Solanti, Michal Babej, Julius Ikkala, Pekka Jääskeläinen

Proceedings of the IWOCL '20: International Workshop on OpenCL, 2020

HIPCL: Tool for Porting CUDA Applications to Advanced OpenCL Platforms Through HIP.

Michal Babej, Pekka Jääskeläinen

Proceedings of the IWOCL '20: International Workshop on OpenCL, 2020

CPSoSaware: Cross-Layer Cognitive Optimization Tools & Methods for the Lifecycle Support of Dependable CPSoS.

Georgios Keramidas, Christos P. Antonopoulos, Nikolaos S. Voros, Pekka Jääskeläinen, Marisa Catalán Cid, Evangelia I. Zacharaki, Apostolos P. Fournaris, Aris S. Lalos

Proceedings of the 2020 IEEE Computer Society Annual Symposium on VLSI, 2020

Programmable Dictionary Code Compression for Instruction Stream Energy Efficiency.

Joonas Multanen, Kari Hepola, Pekka Jääskeläinen

Proceedings of the 38th IEEE International Conference on Computer Design, 2020

Machine Learning is the Solution Also for Foveated Path Tracing Reconstruction.

Atro Lotvonen, Matias Koskela, Pekka Jääskeläinen

Proceedings of the 15th International Joint Conference on Computer Vision, 2020

TTA-SIMD Soft Core Processors.

Kati Tervo, Samawat Malik, Topi Leppänen, Pekka Jääskeläinen

Proceedings of the 30th International Conference on Field-Programmable Logic and Applications, 2020

Design and management of image processing pipelines within CPS: 2 years of experience from the FitOptiVis ECSEL Project.

Luigi Pomante, Francesca Palumbo, Claudia Rinaldi, Giacomo Valente, Carlo Sau, Tiziana Fanni, Frank van der Linden, Twan Basten, Marc Geilen, Geran Peeren, Jirí Kadlec, Pekka Jääskeläinen, Marcos Martinez de Alejandro, Jukka Saarinen, Tero Säntti, Maria Katiuscia Zedda, Victor Sanchez, Dip Goswami, Zaid Al-Ars, Ad de Beer

Proceedings of the 23rd Euromicro Conference on Digital System Design, 2020

2019

Exploiting Task Parallelism with OpenCL: A Case Study.

Pekka Jääskeläinen, Ville Korhonen, Matias Koskela, Jarmo Takala, Karen O. Egiazarian, Aram Danielyan, Cristóvão Cruz, James Price, Simon McIntosh-Smith

J. Signal Process. Syst., 2019

ALMARVI System Solution for Image and Video Processing in Healthcare, Surveillance and Mobile Applications.

Zaid Al-Ars, Steven van der Vlugt, Pekka Jääskeläinen, Frank van der Linden

J. Signal Process. Syst., 2019

LordCore: Energy-Efficient OpenCL-Programmable Software-Defined Radio Coprocessor.

Heikki Kultala, Timo Viitanen, Heikki Berg, Pekka Jääskeläinen, Joonas Multanen, Mikko Kokkonen, Kalle Raiskila, Tommi Zetterman, Jarmo Takala

IEEE Trans. Very Large Scale Integr. Syst., 2019

Blockwise Multi-Order Feature Regression for Real-Time Path-Tracing Reconstruction.

Matias Koskela, Kalle Immonen, Markku J. Mäkitalo, Alessandro Foi, Timo Viitanen, Pekka Jääskeläinen, Heikki Kultala, Jarmo Takala

ACM Trans. Graph., 2019

Programmable and Scalable Architecture for Graphics Processing Units.

Carlos S. de La Lama, Pekka Jääskeläinen, Heikki Kultala, Jarmo Takala

Trans. High Perform. Embed. Archit. Compil., 2019

Towards Efficient Code Generation for Exposed Datapath Architectures.

Kanishkan Vadivel, Roel Jordans, Sander Stuijk, Henk Corporaal, Pekka Jääskeläinen, Heikki Kultala

Proceedings of the 22nd International Workshop on Software and Compilers for Embedded Systems, 2019

Evaluation of Different Processor Architecture Organizations for On-site Electronics in Harsh Environments.

Sven Gesper, Moritz Weißbrich, Stephan Nolting, Tobias Stuckenberg, Pekka Jääskeläinen, Holger Blume, Guillermo Payá Vayá

Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2019

Foveated Real-Time Path Tracing in Visual-Polar Space.

Matias Koskela, Atro Lotvonen, Markku J. Mäkitalo, Petrus E. J. Kivi, Timo Viitanen, Pekka Jääskeläinen

Proceedings of the 30th Eurographics Symposium on Rendering, 2019

SHRIMP: Efficient Instruction Delivery with Domain Wall Memory.

Joonas Multanen, Pekka Jääskeläinen, Asif Ali Khan, Fazal Hameed, Jerónimo Castrillón

Proceedings of the 2019 IEEE/ACM International Symposium on Low Power Electronics and Design, 2019

Reducing Computational Complexity of Real-Time Stereoscopic Ray Tracing with Spatiotemporal Sample Reprojection.

Markku J. Mäkitalo, Petrus E. J. Kivi, Matias Koskela, Pekka Jääskeläinen

Proceedings of the 14th International Joint Conference on Computer Vision, 2019

AEx: Automated Customization of Exposed Datapath Soft-Cores.

Alex Hirvonen, Kati Tervo, Heikki Kultala, Pekka Jääskeläinen

Proceedings of the 22nd Euromicro Conference on Digital System Design, 2019

The FitOptiVis ECSEL project: highly efficient distributed embedded image/video processing in cyber-physical systems.

Zaid Al-Ars, Twan Basten, Ad de Beer, Marc Geilen, Dip Goswami, Pekka Jääskeläinen, Jirí Kadlec, Marcos Martinez de Alejandro, Francesca Palumbo, Geran Peeren, Luigi Pomante, Frank van der Linden, Jukka Saarinen, Tero Säntti, Carlo Sau, Maria Katiuscia Zedda

Proceedings of the 16th ACM International Conference on Computing Frontiers, 2019

2018

Instruction Fetch Energy Reduction with Biased SRAMs.

Joonas Multanen, Timo Viitanen, Pekka Jääskeläinen, Jarmo Takala

J. Signal Process. Syst., 2018

Software Defined Radio Implementation of a Digital Self-interference Cancellation Method for Inband Full-Duplex Radio Using Mobile Processors.

Mona Aghababaeetafreshi, Dani Korpi, Matias Koskela, Pekka Jääskeläinen, Mikko Valkama, Jarmo Takala

J. Signal Process. Syst., 2018

PLOCTree: A Fast, High-Quality Hardware BVH Builder.

Timo Viitanen, Matias Koskela, Pekka Jääskeläinen, Aleksi Tervo, Jarmo Takala

Proc. ACM Comput. Graph. Interact. Tech., 2018

Variable Length Instruction Compression on Transport Triggered Architectures.

Timo Viitanen, Janne Helkala, Heikki Kultala, Pekka Jääskeläinen, Jarmo Takala, Tommi Zetterman, Heikki Berg

Int. J. Parallel Program., 2018

Instantaneous foveated preview for progressive Monte Carlo rendering.

Matias Koskela, Kalle Immonen, Timo Viitanen, Pekka Jääskeläinen, Joonas Multanen, Jarmo H. Takala

Comput. Vis. Media, 2018

Offloading C++17 Parallel STL on System Shared Virtual Memory Platforms.

Pekka Jääskeläinen, John Glossner, Martin Jambor, Aleksi Tervo, Matti Rintala

Proceedings of the High Performance Computing, 2018

LoTTA: Energy-Efficient Processor for Always-On Applications.

Joonas Multanen, Heikki Kultala, Pekka Jääskeläinen, Timo Viitanen, Aleksi Tervo, Jarmo Takala

Proceedings of the 2018 IEEE International Workshop on Signal Processing Systems, 2018

AivoTTA: an energy efficient programmable accelerator for CNN-based object recognition.

Jos IJzerman, Timo Viitanen, Pekka Jääskeläinen, Heikki Kultala, Lasse Lehtonen, Maurice Peemen, Henk Corporaal, Jarmo Takala

Proceedings of the 18th International Conference on Embedded Computer Systems: Architectures, 2018

Energy-Delay Trade-Offs in Instruction Register File Design.

Joonas Multanen, Heikki Kultala, Pekka Jääskeläinen

Proceedings of the 2018 IEEE Nordic Circuits and Systems Conference, 2018

Transport Triggered Polar Decoders.

Mathieu Léonardon, Camille Leroux, Pekka Jääskeläinen, Christophe Jégo, Yvon Savaria

Proceedings of the 10th IEEE International Symposium on Turbo Codes & Iterative Information Processing, 2018

Transport-Triggered Soft Cores.

Pekka Jääskeläinen, Aleksi Tervo, Guillermo Payá Vayá, Timo Viitanen, Nicolai Behmann, Jarmo Takala, Holger Blume

Proceedings of the 2018 IEEE International Parallel and Distributed Processing Symposium Workshops, 2018

Sparse Sampling for Real-time Ray Tracing.

Timo Viitanen, Matias Koskela, Kalle Immonen, Markku J. Mäkitalo, Pekka Jääskeläinen, Jarmo Takala

Proceedings of the 13th International Joint Conference on Computer Vision, Imaging and Computer Graphics Theory and Applications (VISIGRAPP 2018), 2018

2017

Codesign Case Study on Transport-Triggered Architectures.

Jarmo Takala, Pekka Jääskeläinen, Teemu Pitkänen

Proceedings of the Handbook of Hardware/Software Codesign., 2017

MergeTree: A Fast Hardware HLBVH Constructor for Animated Ray Tracing.

Timo Viitanen, Matias Koskela, Pekka Jääskeläinen, Heikki Kultala, Jarmo Takala

ACM Trans. Graph., 2017

Fast Hardware Construction and Refitting of Quantized Bounding Volume Hierarchies.

Timo Viitanen, Matias Koskela, Pekka Jääskeläinen, Kalle Immonen, Jarmo Takala

Comput. Graph. Forum, 2017

Foveated instant preview for progressive rendering.

Matias Koskela, Kalle Immonen, Timo Viitanen, Pekka Jääskeläinen, Joonas Multanen, Jarmo Takala

Proceedings of the SIGGRAPH Asia 2017 Technical Briefs, Bangkok, Thailand, November 27, 2017

Exposed datapath optimizations for loop scheduling.

Heikki O. Kultala, Pekka Jääskeläinen, Johannes IJzerman, Lasse Lehtonen, Timo Viitanen, Markku J. Mäkitalo, Jarmo H. Takala

Proceedings of the 2017 International Conference on Embedded Computer Systems: Architectures, 2017

2016

Improving Code Density with Variable Length Encoding Aware Instruction Scheduling.

Heikki Kultala, Timo Viitanen, Pekka Jääskeläinen, Janne Helkala, Jarmo Takala

J. Signal Process. Syst., 2016

Integer Linear Programming-Based Scheduling for Transport Triggered Architectures.

Tomi Äijö, Pekka Jääskeläinen, Tapio Elomaa, Heikki Kultala, Jarmo Takala

ACM Trans. Archit. Code Optim., 2016

Xor-Masking: A Novel Statistical Method for Instruction Read Energy Reduction in Contemporary SRAM Technologies.

Joonas Multanen, Timo Viitanen, Pekka Jääskeläinen, Jarmo Takala

Proceedings of the 2016 IEEE International Workshop on Signal Processing Systems, 2016

Multi bounding volume hierarchies for ray tracing pipelines.

Timo Viitanen, Matias Koskela, Pekka Jääskeläinen, Jarmo Takala

Proceedings of the SIGGRAPH ASIA 2016, Macao, December 5-8, 2016 - Technical Briefs, 2016

Aggressively bypassing list scheduler for transport triggered architectures.

Heikki O. Kultala, Timo Viitanen, Pekka Jääskeläinen, Jarmo Takala

Proceedings of the International Conference on Embedded Computer Systems: Architectures, 2016

OpenCL programmable exposed datapath high performance low-power image signal processor.

Joonas Multanen, Heikki Kultala, Matias Koskela, Timo Viitanen, Pekka Jääskeläinen, Jarmo Takala, Aram Danielyan, Cristóvão Cruz

Proceedings of the IEEE Nordic Circuits and Systems Conference, 2016

Foveated Path Tracing - A Literature Review and a Performance Gain Analysis.

Matias Koskela, Timo Viitanen, Pekka Jääskeläinen, Jarmo Takala

Proceedings of the Advances in Visual Computing - 12th International Symposium, 2016

Customized high performance low power processor for binaural speaker localization.

Nicolai Behmann, Christopher Seifert, Guillermo Payá Vayá, Holger Blume, Pekka Jääskeläinen, Joonas Multanen, Heikki Kultala, Jarmo Takala, Joachim Thiemann, Steven van de Par

Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016

Half-precision Floating-point Ray Traversal.

Matias Koskela, Timo Viitanen, Pekka Jääskeläinen, Jarmo Takala

Proceedings of the 11th Joint Conference on Computer Vision, Imaging and Computer Graphics Theory and Applications (VISIGRAPP 2016), 2016

Software defined radio implementation of adaptive nonlinear digital self-interference cancellation for mobile inband full-duplex radio.

Mona Aghababaeetafreshi, Matias Koskela, Dani Korpi, Pekka Jääskeläinen, Mikko Valkama, Jarmo Takala

Proceedings of the 2016 IEEE Global Conference on Signal and Information Processing, 2016

2015

Embedded Multi-Core Systems Dedicated to Dynamic Dataflow Programs.

Hervé Yviquel, Alexandre Sanchez, Pekka Jääskeläinen, Jarmo Takala, Mickaël Raulet, Emmanuel Casseau

J. Signal Process. Syst., 2015

Code Density and Energy Efficiency of Exposed Datapath Architectures.

Pekka Jääskeläinen, Heikki Kultala, Timo Viitanen, Jarmo Takala

J. Signal Process. Syst., 2015

Data Intensive Computing: From Modeling to Implementation.

Pekka Jääskeläinen, Jani Boutellier

J. Signal Process. Syst., 2015

pocl: A Performance-Portable OpenCL Implementation.

Pekka Jääskeläinen, Carlos Sánchez de La Lama, Erik Schnetter, Kalle Raiskila, Jarmo Takala, Heikki Berg

Int. J. Parallel Program., 2015

MergeTree: a HLBVH constructor for mobile systems.

Timo Viitanen, Matias Koskela, Pekka Jääskeläinen, Heikki Kultala, Jarmo Takala

Proceedings of the SIGGRAPH Asia 2015 Technical Briefs, Kobe, Japan, November 2-6, 2015, 2015

Power optimizations for transport triggered SIMD processors.

Joonas Multanen, Timo Viitanen, Henry Linjamaki, Heikki Kultala, Pekka Jääskeläinen, Jarmo Takala, Lauri Koskinen, Jesse Simonsson, Heikki Berg, Kalle Raiskila, Tommi Zetterman

Proceedings of the 2015 International Conference on Embedded Computer Systems: Architectures, 2015

Rapid customization of image processors using Halide.

Ville Korhonen, Pekka Jääskeläinen, Matias Koskela, Timo Viitanen, Jarmo Takala

Proceedings of the 2015 IEEE Global Conference on Signal and Information Processing, 2015

Parallel processing intensive digital front-end for IEEE 802.11ac receiver.

Mona Aghababaee Tafreshi, Juha Yli-Kaakinen, Toni Levanen, Ville Korhonen, Pekka Jääskeläinen, Markku Renfors, Mikko Valkama, Jarmo Takala

Proceedings of the 49th Asilomar Conference on Signals, Systems and Computers, 2015

2014

Compiler optimizations for code density of variable length instructions.

Heikki Kultala, Timo Viitanen, Pekka Jääskeläinen, Janne Helkala, Jarmo Takala

Proceedings of the 2014 IEEE Workshop on Signal Processing Systems, 2014

Programmable in-loop deblock filter processor for video decoders.

Janne Janhunen, Pekka Jääskeläinen, Jari Hannuksela, Tero Rintaluoma, Aki Kuusela

Proceedings of the 2014 IEEE Workshop on Signal Processing Systems, 2014

Grover: Looking for Performance Improvement by Disabling Local Memory Usage in OpenCL Kernels.

Jianbin Fang, Henk J. Sips, Pekka Jääskeläinen, Ana Lucia Varbanescu

Proceedings of the 43rd International Conference on Parallel Processing, 2014

Efficient software synthesis of dynamic dataflow programs.

Hervé Yviquel, Alexandre Sanchez, Pekka Jääskeläinen, Jarmo Takala, Mickaël Raulet, Emmanuel Casseau

Proceedings of the IEEE International Conference on Acoustics, 2014

A high throughput LDPC decoder using a mid-range GPU.

Xie Wen, Xianjun Jiao, Pekka Jääskeläinen, Heikki Kultala, Canfeng Chen, Heikki Berg, Zhisong Bie

Proceedings of the IEEE International Conference on Acoustics, 2014

Parallel programming of a symmetric transport-triggered architecture with applications in flexible LDPC encoding.

Blaine Rister, Pekka Jääskeläinen, Olli Silvén, Jari Hannuksela, Joseph R. Cavallaro

Proceedings of the IEEE International Conference on Acoustics, 2014

Heuristics for greedy transport triggered architecture interconnect exploration.

Timo Viitanen, Heikki Kultala, Pekka Jääskeläinen, Jarmo Takala

Proceedings of the 2014 International Conference on Compilers, 2014

2013

Inexpensive correctly rounded floating-point division and square root with input scaling.

Timo Viitanen, Pekka Jääskeläinen, Jarmo Takala

Proceedings of the IEEE Workshop on Signal Processing Systems, 2013

Low-power application-specific FFT processor for LTE applications.

Tomasz Patyk, David Guevorkian, Teemu Pitkänen, Pekka Jääskeläinen, Jarmo Takala

Proceedings of the 2013 International Conference on Embedded Computer Systems: Architectures, 2013

Special session on "Exposed data path architectures: Recent advances and applications".

Jani Boutellier, Pekka Jääskeläinen

Proceedings of the 2013 International Conference on Embedded Computer Systems: Architectures, 2013

Turbo decoding on tailored OpenCL processor.

Heikki Kultala, Otto Esko, Pekka Jääskeläinen, Vladimír Guzma, Jarmo Takala, Xianjun Jiao, Tommi Zetterman, Heikki Berg

Proceedings of the 2013 9th International Wireless Communications and Mobile Computing Conference, 2013

A 122Mb/s Turbo decoder using a mid-range GPU.

Xianjun Jiao, Canfeng Chen, Pekka Jääskeläinen, Vladimír Guzma, Heikki Berg

Proceedings of the 2013 9th International Wireless Communications and Mobile Computing Conference, 2013

Towards run-time actor mapping of dynamic dataflow programs onto multi-core platforms.

Hervé Yviquel, Emmanuel Casseau, Mickaël Raulet, Pekka Jääskeläinen, Jarmo Takala

Proceedings of the 8th International Symposium on Image and Signal Processing and Analysis, 2013

Simplified floating-point division and square root.

Timo Viitanen, Pekka Jääskeläinen, Otto Esko, Jarmo Takala

Proceedings of the IEEE International Conference on Acoustics, 2013

2012

From Parallel Programs to Customized Parallel Processors.

Pekka Jääskeläinen

PhD thesis, 2012

2011

Design Methodology for Offloading Software Executions to FPGA.

Tomasz Patyk, Perttu Salmela, Teemu Pitkänen, Pekka Jääskeläinen, Jarmo Takala

J. Signal Process. Syst., 2011

TCEMC: A co-design flow for application-specific multicores.

Pekka Jääskeläinen, Erno Salminen, Carlos S. de La Lama, Jarmo Takala, José Ignacio Martínez

Proceedings of the 2011 International Conference on Embedded Computer Systems: Architectures, 2011

Customizable Datapath Integrated Lock Unit.

Pekka Jääskeläinen, Erno Salminen, Otto Esko, Jarmo Takala

Proceedings of the 2011 International Symposium on System on Chip, 2011

Operation set customization in retargetable compilers.

Heikki Kultala, Pekka Jääskeläinen, Jarmo Takala

Proceedings of the Conference Record of the Forty Fifth Asilomar Conference on Signals, 2011

2010

OpenCL-based design methodology for application-specific processors.

Pekka Jääskeläinen, Carlos S. de La Lama, Pablo Huerta, Jarmo Takala

Proceedings of the 2010 International Conference on Embedded Computer Systems: Architectures, 2010

Customized Exposed Datapath Soft-Core Design Flow with Compiler Support.

Otto Esko, Pekka Jääskeläinen, Pablo Huerta, Carlos S. de La Lama, Jarmo Takala, José Ignacio Martínez

Proceedings of the International Conference on Field Programmable Logic and Applications, 2010

2009

Reconfigurable video decoder with transform acceleration.

Lassi Nurmi, Perttu Salmela, Pertti Kellomäki, Pekka Jääskeläinen, Jarmo Takala

Proceedings of the IEEE Workshop on Signal Processing Systems, 2009

Programmable Accelerators for Reconfigurable Video Decoder.

Tero Rintaluoma, Timo Reinikka, Joona Rouvinen, Jani Boutellier, Pekka Jääskeläinen, Olli Silvén

Proceedings of the Embedded Computer Systems: Architectures, 2009

Programmable and Scalable Architecture for Graphics Processing Units.

Carlos S. de La Lama, Pekka Jääskeläinen, Jarmo Takala

Proceedings of the Embedded Computer Systems: Architectures, 2009

2008

Resource conflict detection in simulation of function unit pipelines.

Pekka Jääskeläinen, Vladimír Guzma, Viljami Korhonen

J. Syst. Archit., 2008

Impact of Software Bypassing on Instruction Level Parallelism and Register File Traffic.

Vladimír Guzma, Pekka Jääskeläinen, Pertti Kellomäki, Jarmo Takala

Proceedings of the Embedded Computer Systems: Architectures, 2008

Reducing Context Switch Overhead with Compiler-Assisted Threading.

Pekka Jääskeläinen, Pertti Kellomäki, Jarmo Takala, Heikki Kultala, Mikael Lepistö

Proceedings of the 2008 IEEE/IPIP International Conference on Embedded and Ubiquitous Computing (EUC 2008), 2008

2007

Resource Conflict Detection in Simulation of Function Unit Pipelines.

Pekka Jääskeläinen, Vladimír Guzma, Jarmo Takala

Proceedings of the Embedded Computer Systems: Architectures, 2007

Run-Time Scheduled Hardware Acceleration of MPEG-4 Video Decoding.

Jani Boutellier, Pekka Jääskeläinen, Olli Silvén

Proceedings of the International Symposium on System-on-Chip, 2007

2006

Software Pipelining Support for Transport Triggered Architecture Processors.

Perttu Salmela, Pekka Jääskeläinen, Tuomas Järvinen, Jarmo Takala

Proceedings of the Embedded Computer Systems: Architectures, 2006

Loop Scheduling for Transport Triggered Architecture Processors.

Perttu Salmela, Risto Mäkinen, Pekka Jääskeläinen, Jarmo Takala

Proceedings of the International Symposium on System-on-Chip, 2006