Joseph Nguyen

According to our database, Joseph Nguyen authored at least 4 papers between 2016 and 2018.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2018

A 128 kb 7T SRAM Using a Single-Cycle Boosting Mechanism in 28-nm FD-SOI.

Babak Mohammadi, Oskar Andersson, Joseph Nguyen, Lorenzo Ciampolini, Andreia Cathelin, Joachim Neves Rodrigues

IEEE Trans. Circuits Syst. I Regul. Pap., 2018

2016

RAPIDO Testing and Modeling of Assisted Write and Read Operations for SRAMs.

Joseph Nguyen, David Turgis, David Bonciani, Brice Lhomme, Yann Carminati, Olivier Callen, Guillaume Guirleo, Lorenzo Ciampolini, Gérard Ghibaudo

Proceedings of the 25th IEEE North Atlantic Test Workshop, 2016

Efficient yield estimation through generalized importance sampling with application to NBL-assisted SRAM bitcells.

Lorenzo Ciampolini, Jean-Christophe Lafont, Faress Tissafi Drissi, Jean-Paul Morin, David Turgis, Xavier Jonsson, Cyril Desclèves, Joseph Nguyen

Proceedings of the 35th International Conference on Computer-Aided Design, 2016

A 128 kb single-bitline 8.4 fJ/bit 90MHz at 0.3V 7T sense-amplifierless SRAM in 28 nm FD-SOI.

Babak Mohammadi, Oskar Andersson, Joseph Nguyen, Lorenzo Ciampolini, Andreia Cathelin, Joachim Neves Rodrigues

Proceedings of the ESSCIRC Conference 2016: 42^nd European Solid-State Circuits Conference, 2016