Joshua M. Lucas

According to our database, Joshua M. Lucas authored at least 5 papers between 2004 and 2007.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2007

Linking Compilation and Visualization for Massively Parallel Programs.

Alex K. Jones, Raymond R. Hoare, Joseph St. Onge, Joshua M. Lucas, Shuyi Shao, Rami G. Melhem

Proceedings of the 21th International Parallel and Distributed Processing Symposium (IPDPS 2007), 2007

2006

Technology mapping for Field Programmable Gate Arrays using Content-Addressable Memory (CAM).

Joshua M. Lucas, Raymond Hoare, Ivan S. Kourtev, Alex K. Jones

Microprocess. Microsystems, 2006

A Low-Energy Reconfigurable Fabric for the SuperCISC Architecture.

Gayatri Mehta, Justin Stander, Joshua M. Lucas, Raymond R. Hoare, Brady Hunsaker, Alex K. Jones

J. Low Power Electron., 2006

2005

Optimizing Technology Mapping for FPGAs Using CAMs.

Joshua M. Lucas, Raymond Hoare, Alex K. Jones

Proceedings of the 13th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2005), 2005

2004

LURU: global-scope FPGA technology mapping with content-addressable memories.

Joshua M. Lucas, Raymond R. Hoare, Ivan S. Kourtev, Alex K. Jones

Proceedings of the 2004 11th IEEE International Conference on Electronics, 2004