Rami G. Melhem

Orcid: 0000-0001-6403-5446

Affiliations:
  • University of Pittsburgh, Pennsylvania, USA


According to our database1, Rami G. Melhem authored at least 306 papers between 1982 and 2023.

Collaborative distances:

Awards

IEEE Fellow

IEEE Fellow 2000, "For contributions to application of optical technology and design of interconnection networks for computer systems.".

Timeline

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Bibliography

2023
diffReplication - An Energy-Aware Fault Tolerance Model for Silent Error Detection and Mitigation in Heterogeneous Extreme-scale Computing Environment.
J. Univers. Comput. Sci., August, 2023

2021
A CASTLE With TOWERs for Reliable, Secure Phase-Change Memory.
IEEE Trans. Computers, 2021

Differential Shadowing: A Resilience Framework for Extreme-scale, Heterogeneous Environments with Non-Uniform Node Failure Distribution.
Proceedings of the IEEE International Performance, 2021

Tuning Memory Fault Tolerance on the Edge.
Proceedings of the GLSVLSI '21: Great Lakes Symposium on VLSI 2021, 2021

An Adaptive Framework for Oversubscription Management in CPU-GPU Unified Memory.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

2020
Sustainable disturbance crosstalk mitigation in deeply scaled phase-change memory.
Sustain. Comput. Informatics Syst., 2020

Graphite: A NUMA-aware HPC System for Graph Analytics Based on a new MPI * X Parallelism Model.
Proc. VLDB Endow., 2020

Adaptive Page Migration for Irregular Data-intensive Applications under GPU Memory Oversubscription.
Proceedings of the 2020 IEEE International Parallel and Distributed Processing Symposium (IPDPS), 2020

Accelerating Distributed Inference of Sparse Deep Neural Networks via Mitigating the Straggler Effect.
Proceedings of the 2020 IEEE High Performance Extreme Computing Conference, 2020

Studying the Effects of Hashing of Sparse Deep Neural Networks on Data and Model Parallelisms.
Proceedings of the 2020 IEEE High Performance Extreme Computing Conference, 2020

FLOWER and FaME: A Low Overhead Bit-Level Fault-map and Fault-Tolerance Approach for Deeply Scaled Memories.
Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2020

Enhancing Reliability-Aware Speedup Modelling via Replication.
Proceedings of the 50th Annual IEEE/IFIP International Conference on Dependable Systems and Networks, 2020

Enhancing Address Translations in Throughput Processors via Compression.
Proceedings of the PACT '20: International Conference on Parallel Architectures and Compilation Techniques, 2020

2019
GreenChip: A tool for evaluating holistic sustainability of modern computing systems.
Sustain. Comput. Informatics Syst., 2019

Yielding optimized dependability assurance through bit inversion.
Integr., 2019

Partitioning Graphs for the Cloud using Reinforcement Learning.
CoRR, 2019

PREMSim: A Resilience Framework for Modeling Traditional and Emerging Memory Reliability.
Proceedings of the 27th IEEE International Symposium on Modeling, 2019

The Power of Orthogonality.
Proceedings of the 2019 IEEE Computer Society Annual Symposium on VLSI, 2019

Interplay between hardware prefetcher and page eviction policy in CPU-GPU unified virtual memory.
Proceedings of the 46th International Symposium on Computer Architecture, 2019

Optimal Placement of In-memory Checkpoints Under Heterogeneous Failure Likelihoods.
Proceedings of the 2019 IEEE International Parallel and Distributed Processing Symposium, 2019

Multithreaded Layer-wise Training of Sparse Deep Neural Networks using Compressed Sparse Column.
Proceedings of the 2019 IEEE High Performance Extreme Computing Conference, 2019

Toward Secure, Reliable, and Energy Efficient Phase-change Main Memory with MACE.
Proceedings of the Tenth International Green and Sustainable Computing Conference, 2019

Leveraging Transverse Reads to Correct Alignment Faults in Domain Wall Memories.
Proceedings of the 49th Annual IEEE/IFIP International Conference on Dependable Systems and Networks, 2019

Predicting Single Event Effects in DRAM.
Proceedings of the 2019 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2019

Efficient Distributed Graph Analytics using Triply Compressed Sparse Format.
Proceedings of the 2019 IEEE International Conference on Cluster Computing, 2019

2018
Data Block Partitioning Methods to Mitigate Stuck-At Faults in Limited Endurance Memories.
IEEE Trans. Very Large Scale Integr. Syst., 2018

Racetrack Queues for Extremely Low-Energy FIFOs.
IEEE Trans. Very Large Scale Integr. Syst., 2018

A Process-Variation-Tolerant Method for Nanophotonic On-Chip Network.
ACM J. Emerg. Technol. Comput. Syst., 2018

RETROFIT: Fault-Aware Wear Leveling.
IEEE Comput. Archit. Lett., 2018

Counter Advance for Reliable Encryption in Phase Change Memory.
IEEE Comput. Archit. Lett., 2018

Partial redundancy in HPC systems with non-uniform node reliabilities.
Proceedings of the International Conference for High Performance Computing, 2018

Mitigating Wordline Crosstalk Using Adaptive Trees of Counters.
Proceedings of the 45th ACM/IEEE Annual International Symposium on Computer Architecture, 2018

CoLoR: Co-Located Rescuers for Fault Tolerance in HPC Systems.
Proceedings of the 24th IEEE International Conference on Parallel and Distributed Systems, 2018

A systematic fault-tolerant computational model for both crash failures and silent data corruption.
Proceedings of the 21st Conference on Innovation in Clouds, 2018

Enabling Fine-Grain Restricted Coset Coding Through Word-Level Compression for PCM.
Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2018

Improving Sustainability Through Disturbance Crosstalk Mitigation in Deeply Scaled Phase-change Memory.
Proceedings of the Ninth International Green and Sustainable Computing Conference, 2018

Revolver: Vertex-Centric Graph Partitioning Using Reinforcement Learning.
Proceedings of the 11th IEEE International Conference on Cloud Computing, 2018

2017
A Variable Length Coding Framework for Cost Function Reduction in Non-Volatile Memory Systems.
CoRR, 2017

Counter-Based Tree Structure for Row Hammering Mitigation in DRAM.
IEEE Comput. Archit. Lett., 2017

Mitigating bitline crosstalk noise in DRAM memories.
Proceedings of the International Symposium on Memory Systems, 2017

Quality of Service Support for Fine-Grained Sharing on GPUs.
Proceedings of the 44th Annual International Symposium on Computer Architecture, 2017

Yoda: Judge Me by My Size, Do You?
Proceedings of the 2017 IEEE International Conference on Computer Design, 2017

Dynamic partitioning to mitigate stuck-at faults in emerging memories.
Proceedings of the 2017 IEEE/ACM International Conference on Computer-Aided Design, 2017

Rejuvenating Shadows: Fault Tolerance with Forward Recovery.
Proceedings of the 19th IEEE International Conference on High Performance Computing and Communications; 15th IEEE International Conference on Smart City; 3rd IEEE International Conference on Data Science and Systems, 2017

Sustainable fault management and error correction for next-generation main memories.
Proceedings of the Eighth International Green and Sustainable Computing Conference, 2017

Holistic energy efficient crosstalk mitigation in DRAM.
Proceedings of the Eighth International Green and Sustainable Computing Conference, 2017

Harvesting Underutilized Resources to Improve Responsiveness and Tolerance to Crash and Silent Faults for Data-Intensive Applications.
Proceedings of the 2017 IEEE 10th International Conference on Cloud Computing (CLOUD), 2017

2016
ContextPreRF: Enhancing the Performance and Energy of GPUs With Nonuniform Register Access.
IEEE Trans. Very Large Scale Integr. Syst., 2016

Weighted-Tuple: Fast and Accurate Synchronization for Parallel Architecture Simulators.
IEEE Trans. Parallel Distributed Syst., 2016

FusedCache: A Naturally Inclusive, Racetrack Memory, Dual-Level Private Cache.
IEEE Trans. Multi Scale Comput. Syst., 2016

Improving Bit Flip Reduction for Biased and Random Data.
IEEE Trans. Computers, 2016

Symbol Shifting: Tolerating More Faults in PCM Blocks.
IEEE Trans. Computers, 2016

Symmetry-Agnostic Coordinated Management of the Memory Hierarchy in Multicore Systems.
ACM Trans. Archit. Code Optim., 2016

Simultaneous Multikernel: Fine-Grained Sharing of GPUs.
IEEE Comput. Archit. Lett., 2016

Adaptive and Power-Aware Resilience for Extreme-Scale Computing.
Proceedings of the 2016 Intl IEEE Conferences on Ubiquitous Intelligence & Computing, 2016

Empirical, Analytical Study of Hardware-Based Page Swap in Hybrid Main Memory System.
Proceedings of the 28th International Symposium on Computer Architecture and High Performance Computing, 2016

Write Pulse Scaling for Energy Efficient STT-MRAM.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2016

Concurrent Migration of Multiple Pages in software-managed hybrid main memory.
Proceedings of the 34th IEEE International Conference on Computer Design, 2016

Simultaneous Multikernel GPU: Multi-tasking throughput processors via fine-grained sharing.
Proceedings of the 2016 IEEE International Symposium on High Performance Computer Architecture, 2016

Holistically evaluating the environmental impacts in modern computing systems.
Proceedings of the Seventh International Green and Sustainable Computing Conference, 2016

Leveraging ECC to Mitigate Read Disturbance, False Reads and Write Faults in STT-RAM.
Proceedings of the 46th Annual IEEE/IFIP International Conference on Dependable Systems and Networks, 2016

2015
Energy-Efficient Thread Assignment Optimization for Heterogeneous Multicore Systems.
ACM Trans. Embed. Comput. Syst., 2015

RDIS: Tolerating Many Stuck-At Faults in Resistive Memory.
IEEE Trans. Computers, 2015

HMMSim: a simulator for hardware-software co-design of hybrid main memory.
Proceedings of the IEEE Non-Volatile Memory System and Applications Symposium, 2015

SAWS: synchronization aware GPGPU warp scheduling for multiple independent warp schedulers.
Proceedings of the 48th International Symposium on Microarchitecture, 2015

Characterizing the Overhead of Software-Managed Hybrid Main Memory.
Proceedings of the 23rd IEEE International Symposium on Modeling, 2015

Reciprocal abstraction for computer architecture co-simulation.
Proceedings of the 2015 IEEE International Symposium on Performance Analysis of Systems and Software, 2015

GASOLIN: Global Arbitration for Streams of Data in Optical Links.
Proceedings of the 2015 IEEE International Parallel and Distributed Processing Symposium, 2015

CAFO: Cost aware flip optimization for asymmetric memories.
Proceedings of the 21st IEEE International Symposium on High Performance Computer Architecture, 2015

Supporting superpages in non-contiguous physical memory.
Proceedings of the 21st IEEE International Symposium on High Performance Computer Architecture, 2015

Space Oblivious Compression: Power Reduction for Non-Volatile Main Memories.
Proceedings of the 25th edition on Great Lakes Symposium on VLSI, GLVLSI 2015, Pittsburgh, PA, USA, May 20, 2015

MSCS: Multi-hop Segmented Circuit Switching.
Proceedings of the 25th edition on Great Lakes Symposium on VLSI, GLVLSI 2015, Pittsburgh, PA, USA, May 20, 2015

PRES: pseudo-random encoding scheme to increase the bit flip reduction in the memory.
Proceedings of the 52nd Annual Design Automation Conference, 2015

Domain-wall memory buffer for low-energy NoCs.
Proceedings of the 52nd Annual Design Automation Conference, 2015

BandArb: mitigating the effects of thermal and process variations in silicon-photonic network.
Proceedings of the 12th ACM International Conference on Computing Frontiers, 2015

Understanding the limiting factors of page migration in hybrid main memory.
Proceedings of the 12th ACM International Conference on Computing Frontiers, 2015

Multilane Racetrack caches: Improving efficiency through compression and independent shifting.
Proceedings of the 20th Asia and South Pacific Design Automation Conference, 2015

2014
Refresh Now and Then.
IEEE Trans. Computers, 2014

A Practical Data Classification Framework for Scalable and High Performance Chip-Multiprocessors.
IEEE Trans. Computers, 2014

Energy Consumption of Resilience Mechanisms in Large Scale Systems.
Proceedings of the 22nd Euromicro International Conference on Parallel, 2014

Weighted-Tuple Synchronization for Parallel Architecture Simulators.
Proceedings of the IEEE 22nd International Symposium on Modelling, 2014

Shadow Computing: An energy-aware fault tolerant computing model.
Proceedings of the International Conference on Computing, Networking and Communications, 2014

Shadows on the Cloud: An Energy-aware, Profit Maximizing Resilience Framework for Cloud Computing.
Proceedings of the CLOSER 2014, 2014

Concurrent page migration for mobile systems with OS-managed hybrid memory.
Proceedings of the Computing Frontiers Conference, CF'14, 2014

2013
<i>Ordering</i> circuit establishment in multiplane NoCs.
ACM Trans. Design Autom. Electr. Syst., 2013

PS-TLB: Leveraging page classification information for fast, scalable and efficient translation for future CMPs.
ACM Trans. Archit. Code Optim., 2013

Delta-compressed caching for overcoming the write bandwidth limitation of hybrid main memory.
ACM Trans. Archit. Code Optim., 2013

Assessing the Performance of Energy-Aware mappings.
Parallel Process. Lett., 2013

Data Dependent Sparing to Manage Better-Than-Bad Blocks.
IEEE Comput. Archit. Lett., 2013

Power of One Bit: Increasing Error Correction Capability with Data Inversion.
Proceedings of the IEEE 19th Pacific Rim International Symposium on Dependable Computing, 2013

Bit mapping for balanced PCM cell programming.
Proceedings of the 40th Annual International Symposium on Computer Architecture, 2013

Deterministic Multiplexing of NoC on Grid CMPs.
Proceedings of the IEEE 21st Annual Symposium on High-Performance Interconnects, 2013

Energy-aware checkpointing of divisible tasks with soft or hard deadlines.
Proceedings of the International Green Computing Conference, 2013

Proactive circuit allocation in multiplane NoCs.
Proceedings of the 50th Annual Design Automation Conference 2013, 2013

Writeback-aware bandwidth partitioning for multi-core systems with PCM.
Proceedings of the 22nd International Conference on Parallel Architectures and Compilation Techniques, 2013

2012
Compiler-Assisted Data Distribution and Network Configuration for Chip Multiprocessors.
IEEE Trans. Parallel Distributed Syst., 2012

Codesign of NoC and Cache Organization for Reducing Access Latency in Chip Multiprocessors.
IEEE Trans. Parallel Distributed Syst., 2012

Guest Editors' Introduction: Special Section on Energy Efficient Computing.
IEEE Trans. Computers, 2012

Writeback-aware partitioning and replacement for last-level caches in phase change main memory systems.
ACM Trans. Archit. Code Optim., 2012

Leveraging Sharing in Second Level Translation-Lookaside Buffers for Chip Multiprocessors.
IEEE Comput. Archit. Lett., 2012

Thread Assignment Optimization with Real-Time Performance and Memory Bandwidth Guarantees for Energy-Efficient Heterogeneous Multi-core Systems.
Proceedings of the 2012 IEEE 18th Real Time and Embedded Technology and Applications Symposium, 2012

Déjà Vu Switching for Multiplane NoCs.
Proceedings of the 2012 Sixth IEEE/ACM International Symposium on Networks-on-Chip (NoCS), 2012

Tolerating process variations in nanophotonic on-chip networks.
Proceedings of the 39th International Symposium on Computer Architecture (ISCA 2012), 2012

Power-aware Manhattan Routing on Chip Multiprocessors.
Proceedings of the 26th IEEE International Parallel and Distributed Processing Symposium, 2012

Channel borrowing: an energy-efficient nanophotonic crossbar architecture with light-weight arbitration.
Proceedings of the International Conference on Supercomputing, 2012

RDIS: A recursively defined invertible set scheme to tolerate multiple stuck-at faults in resistive memory.
Proceedings of the IEEE/IFIP International Conference on Dependable Systems and Networks, 2012

Practically private: enabling high performance CMPs through compiler-assisted data classification.
Proceedings of the International Conference on Parallel Architectures and Compilation Techniques, 2012

2011
An optimal boundary fair scheduling algorithm for multiprocessor real-time systems.
J. Parallel Distributed Comput., 2011

Advanced hashing schemes for packet forwarding using set associative memory architectures.
J. Parallel Distributed Comput., 2011

C-AMTE: A location mechanism for flexible cache management in chip multiprocessors.
J. Parallel Distributed Comput., 2011

Real-Time Scheduling for Phase Change Main Memory Systems.
Proceedings of the IEEE 10th International Conference on Trust, 2011

Two-hop Free-space based optical interconnects for chip multiprocessors.
Proceedings of the NOCS 2011, 2011

A Novel Scalable IPv6 Lookup Scheme Using Compressed Pipelined Tries.
Proceedings of the NETWORKING 2011, 2011

Scalable Multi-cache Simulation Using GPUs.
Proceedings of the MASCOTS 2011, 2011

Analyzing the impact of useless write-backs on the endurance and energy consumption of PCM main memory.
Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2011

Energy-Aware Mappings of Series-Parallel Workflows onto Chip Multiprocessors.
Proceedings of the International Conference on Parallel Processing, 2011

Cache equalizer: a placement mechanism for chip multiprocessor distributed shared caches.
Proceedings of the High Performance Embedded Architectures and Compilers, 2011

NoC-aware cache design for multithreaded execution on tiled chip multiprocessors.
Proceedings of the High Performance Embedded Architectures and Compilers, 2011

Impact of process variation on endurance algorithms for wear-prone memories.
Proceedings of the Design, Automation and Test in Europe, 2011

2010
On the Interplay of Parallelization, Program Performance, and Energy Consumption.
IEEE Trans. Parallel Distributed Syst., 2010

A Dynamic Pressure-Aware Associative Placement Strategy for Large Scale Chip Multiprocessors.
IEEE Comput. Archit. Lett., 2010

Using PCM in Next-generation Embedded Space Applications.
Proceedings of the 16th IEEE Real-Time and Embedded Technology and Applications Symposium, 2010

Increasing PCM main memory lifetime.
Proceedings of the Design, Automation and Test in Europe, 2010

Automated modeling and emulation of interconnect designs for many-core chip multiprocessors.
Proceedings of the 47th Design Automation Conference, 2010

Applying statistical machine learning to multicore voltage & frequency scaling.
Proceedings of the 7th Conference on Computing Frontiers, 2010

Compiler-assisted data distribution for chip multiprocessors.
Proceedings of the 19th International Conference on Parallel Architectures and Compilation Techniques, 2010

An intra-tile cache set balancing scheme.
Proceedings of the 19th International Conference on Parallel Architectures and Compilation Techniques, 2010

NoC-aware cache design for chip multiprocessors.
Proceedings of the 19th International Conference on Parallel Architectures and Compilation Techniques, 2010

2009
Compiler Techniques for Efficient Communications in Circuit Switched Networks for Multiprocessor Systems.
IEEE Trans. Parallel Distributed Syst., 2009

Oblivious routing in fat-tree based system area networks with uncertain traffic demands.
IEEE/ACM Trans. Netw., 2009

Energy efficient redundant configurations for real-time parallel reliable servers.
Real Time Syst., 2009

Minimizing expected energy consumption for streaming applications with linear dependencies on chip multiprocessors.
Proceedings of the IEEE Fourth International Symposium on Industrial Embedded Systems, 2009

CHAP: Enabling Efficient Hardware-Based Multiple Hash Schemes for IP Lookup.
Proceedings of the NETWORKING 2009, 2009

Dynamic cache clustering for chip multiprocessors.
Proceedings of the 23rd international conference on Supercomputing, 2009

Winning with Pinning in NoC.
Proceedings of the 17th IEEE Symposium on High Performance Interconnects, 2009

ACM: An Efficient Approach for Managing Shared Caches in Chip Multiprocessors.
Proceedings of the High Performance Embedded Architectures and Compilers, 2009

Considering Link Qualities in Fault-Tolerant Aggregation in Wireless Sensor Networks.
Proceedings of the Global Communications Conference, 2009. GLOBECOM 2009, Honolulu, Hawaii, USA, 30 November, 2009

Progressive hashing for packet processing using set associative memory.
Proceedings of the 2009 ACM/IEEE Symposium on Architecture for Networking and Communications Systems, 2009

2008
Symbolic Expression Analysis for Compiled Communication.
Parallel Process. Lett., 2008

Corollaries to Amdahl's Law for Energy.
IEEE Comput. Archit. Lett., 2008

On the Emulation of Finite-Buffered Output Queued Switches Using Combined Input-Output Queuing.
Proceedings of the Distributed Computing, 22nd International Symposium, 2008

Jamming Mitigation in Multi-Radio Wireless Networks: Reactive or Proactive?
Proceedings of the 4th International ICST Conference on Security and Privacy in Communication Networks, 2008

Modeling of the channel-hopping anti-jamming defense in multi-radio wireless networks.
Proceedings of the 5th Annual International Conference on Mobile and Ubiquitous Systems: Computing, 2008

GroupBeat: Wireless sensor networks made reliable.
Proceedings of the IEEE 5th International Conference on Mobile Adhoc and Sensor Systems, 2008

Live Baiting for Service-Level DoS Attackers.
Proceedings of the INFOCOM 2008. 27th IEEE International Conference on Computer Communications, 2008

An Efficient Hardware-Based Multi-hash Scheme for High Speed IP Lookup.
Proceedings of the 16th Annual IEEE Symposium on High Performance Interconnects (HOTI 2008), 2008

Integrated CPU Cache Power Management in Multiple Clock Domain Processors.
Proceedings of the High Performance Embedded Architectures and Compilers, 2008

2007
Power Aware Mapping of Real-Time Tasks to Multiprocessors.
Proceedings of the Handbook of Parallel Computing - Models, Algorithms and Applications., 2007

Minimizing expected energy consumption in real-time systems through dynamic voltage scaling.
ACM Trans. Comput. Syst., 2007

Low Diameter Interconnections for Routing in High-Performance Parallel Systems.
IEEE Trans. Computers, 2007

Near-Memory Caching for Improved Energy Consumption.
IEEE Trans. Computers, 2007

Power management in external memory using PA-CDRAM.
Int. J. Embed. Syst., 2007

Energy-Aware Scheduling for Streaming Applications on Chip Multiprocessors.
Proceedings of the 28th IEEE Real-Time Systems Symposium (RTSS 2007), 2007

Integrated CPU and l2 cache voltage scaling using machine learning.
Proceedings of the 2007 ACM SIGPLAN/SIGBED Conference on Languages, 2007

CA-RAM: A High-Performance Memory Substrate for Search-Intensive Applications.
Proceedings of the 2007 IEEE International Symposium on Performance Analysis of Systems and Software, 2007

Linking Compilation and Visualization for Massively Parallel Programs.
Proceedings of the 21th International Parallel and Distributed Processing Symposium (IPDPS 2007), 2007

Scheduling to Minimize theWorst-Case Loss Rate.
Proceedings of the 27th IEEE International Conference on Distributed Computing Systems (ICDCS 2007), 2007

A unified practical approach to stochastic DVS scheduling.
Proceedings of the 7th ACM & IEEE International conference on Embedded software, 2007

2006
Collaborative operating system and compiler power management for real-time applications.
ACM Trans. Embed. Comput. Syst., 2006

Analysis of a transmission scheduling algorithm for supporting bandwidth guarantees in bufferless networks.
SIGMETRICS Perform. Evaluation Rev., 2006

Honeypot back-propagation for mitigating spoofing distributed Denial-of-Service attacks.
J. Parallel Distributed Comput., 2006

A unified interference/collision model for optimal MAC transmission power in ad hoc networks.
Int. J. Wirel. Mob. Comput., 2006

RideSharing: Fault Tolerant Aggregation in Sensor Networks Using Corrective Actions.
Proceedings of the Third Annual IEEE Communications Society on Sensor and Ad Hoc Communications and Networks, 2006

Interconnect routing and scheduling - Level-wise scheduling algorithm for fat tree interconnection networks.
Proceedings of the ACM/IEEE SC2006 Conference on High Performance Networking and Computing, 2006

Supporting Loss Guarantees in Buffer-Limited Networks.
Proceedings of the Quality of Service - IWQoS 2006: 14th International Workshop, 2006

A compiler-based communication analysis approach for multiprocessor systems.
Proceedings of the 20th International Parallel and Distributed Processing Symposium (IPDPS 2006), 2006

Honeybees: combining replication and evasion for mitigating base-station jamming in sensor networks.
Proceedings of the 20th International Parallel and Distributed Processing Symposium (IPDPS 2006), 2006

Mitigating the FloodingWaves Problem in Energy-Efficient Routing for MANETs.
Proceedings of the 26th IEEE International Conference on Distributed Computing Systems (ICDCS 2006), 2006

Secure-CITI Critical Information-Technology Infrastructure.
Proceedings of the 7th Annual International Conference on Digital Government Research, 2006

2005
A framework for the design, synthesis and cycle-accurate simulation of multiprocessor networks.
J. Parallel Distributed Comput., 2005

Multi-version scheduling in rechargeable energy-aware real-time systems.
J. Embed. Comput., 2005

BLAM: an energy-aware MAC layer enhancement for wireless adhoc networks.
Proceedings of the IEEE Wireless Communications and Networking Conference, 2005

On the Feasibility of Optical Circuit Switching for High Performance Computing Systems.
Proceedings of the ACM/IEEE SC2005 Conference on High Performance Networking and Computing, 2005

Energy-efficient policies for embedded clusters.
Proceedings of the 2005 ACM SIGPLAN/SIGBED Conference on Languages, 2005

Switch Design to Enable Predictive Multiplexed Switching in Multiprocessor Networks.
Proceedings of the 19th International Parallel and Distributed Processing Symposium (IPDPS 2005), 2005

Minimizing expected energy in real-time embedded systems.
Proceedings of the EMSOFT 2005, 2005

Energy Efficient Configuration for QoS in Reliable Parallel Servers.
Proceedings of the Dependable Computing, 2005

Energy Conservation in Memory Hierarchies using Power-Aware Cached-DRAM.
Proceedings of the Power-aware Computing Systems, 3.-8. April 2005, 2005

2004
Periodic Reward-Based Scheduling and Its Application to Power-Aware Real-Time Systems.
Proceedings of the Handbook of Scheduling - Algorithms, Models, and Performance Analysis., 2004

Power-Aware Scheduling for AND/OR Graphs in Real-Time Systems.
IEEE Trans. Parallel Distributed Syst., 2004

Node delay assignment strategies to support end-to-end delay requirements in heterogeneous networks.
IEEE/ACM Trans. Netw., 2004

The Interplay of Power Management and Fault Recovery in Real-Time Systems.
IEEE Trans. Computers, 2004

Power-Aware Scheduling for Periodic Real-Time Tasks.
IEEE Trans. Computers, 2004

Design and analysis of a replicated elusive server scheme for mitigating denial of service attacks.
J. Syst. Softw., 2004

An efficient algorithm for constructing delay bounded minimum cost multicast trees.
J. Parallel Distributed Comput., 2004

Dynamic rate-selection for extending the lifetime of energy-constrained networks.
Proceedings of the 23rd IEEE International Performance Computing and Communications Conference, 2004

A Unified Interference/Collision Analysis for Power-Aware Adhoc Networks.
Proceedings of the Proceedings IEEE INFOCOM 2004, 2004

Analysis of an Energy Efficient Optimistic TMR Scheme.
Proceedings of the 10th International Conference on Parallel and Distributed Systems, 2004

Roaming Honeypots for Mitigating Service-Level Denial-of-Service Attacks.
Proceedings of the 24th International Conference on Distributed Computing Systems (ICDCS 2004), 2004

The effects of energy management on reliability in real-time embedded systems.
Proceedings of the 2004 International Conference on Computer-Aided Design, 2004

Practical PACE for embedded systems.
Proceedings of the EMSOFT 2004, 2004

Energy-Efficient Policies for Request-Driven Soft Real-Time Systems.
Proceedings of the 16th Euromicro Conference on Real-Time Systems (ECRTS 2004), 30 June, 2004

Decoupling Packet Loss from Blocking in Proactive Reservation-Based Switching.
Proceedings of the 1st International Conference on Broadband Networks (BROADNETS 2004), 2004

2003
A Nonpreemptive Real-Time Scheduler with Recovery from Transient Faults and Its Implementation.
IEEE Trans. Software Eng., 2003

Scheduling with Dynamic Voltage/Speed Adjustment Using Slack Reclamation in Multiprocessor Real-Time Systems.
IEEE Trans. Parallel Distributed Syst., 2003

Algorithms for Supporting Compiled Communication.
IEEE Trans. Parallel Distributed Syst., 2003

Maximizing rewards for real-time applications with energy constraints.
ACM Trans. Embed. Comput. Syst., 2003

An Incremental Server for Scheduling Overloaded Real-Time Systems.
IEEE Trans. Computers, 2003

An Improved Rate-Monotonic Admission Control and Its Applications.
IEEE Trans. Computers, 2003

Maximizing the system value while satisfying time and energy constraints.
IBM J. Res. Dev., 2003

Multiple-Resource Periodic Scheduling Problem: how much fairness is necessary?
Proceedings of the 24th IEEE Real-Time Systems Symposium (RTSS 2003), 2003

Collaborative Operating System and Compiler Power Management for Real-Time Applications.
Proceedings of the 9th IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS 2003), 2003

Energy management for real-time embedded applications with compiler support.
Proceedings of the 2003 Conference on Languages, 2003

Energy Aware Scheduling for Distributed Real-Time Systems.
Proceedings of the 17th International Parallel and Distributed Processing Symposium (IPDPS 2003), 2003

A Simulation Study of the Proactive Server Roaming for Mitigating Denial of Service Attacks.
Proceedings of the Proceedings 36th Annual Simulation Symposium (ANSS-36 2003), Orlando, Florida, USA, March 30, 2003

2002
Multicast routing and wavelength assignment in multihop optical networks.
IEEE/ACM Trans. Netw., 2002

Low-cost, delay-bounded point-to-multipoint communication to support multicasting over WDM networks.
Comput. Networks, 2002

Energy-Efficient Duplex and TMR Real-Time Systems.
Proceedings of the 23rd IEEE Real-Time Systems Symposium (RTSS'02), 2002

Power Aware Scheduling for AND/OR Graphs in Multi-Processor Real-Time Systems.
Proceedings of the 31st International Conference on Parallel Processing (ICPP 2002), 2002

On the Performance of STAR: An Efficient Delay-Bound, Low-Cost Multicast Algorithm.
Proceedings of the Proceedings 35th Annual Simulation Symposium (ANSS-35 2002), 2002

2001
Optimal Reward-Based Scheduling for Periodic Real-Time Tasks.
IEEE Trans. Computers, 2001

Minimizing Wavelength Conversions in WDM Path Establishment.
Photonic Netw. Commun., 2001

Performance of Multi-hop Communications Using Logical Topologies on Optical Torus Networks.
J. Parallel Distributed Comput., 2001

A high speed scheduler/controller for unbuffered banyan networks.
Comput. Commun., 2001

Scheduling with Dynamic Voltage/Speed Adjustment Using Slack Reclamation in Multi-Processor Real-Time Systems.
Proceedings of the 22nd IEEE Real-Time Systems Symposium (RTSS 2001), 2001

Dynamic and Aggressive Scheduling Techniques for Power-Aware Real-Time Systems.
Proceedings of the 22nd IEEE Real-Time Systems Symposium (RTSS 2001), 2001

Multicast Routing and Wavelength Assignment in Multi-Hop Optical Networks.
Proceedings of the Networking, 2001

Determining Optimal Processor Speeds for Periodic Real-Time Tasks with Different Power Characteristics.
Proceedings of the 13th Euromicro Conference on Real-Time Systems (ECRTS 2001), 2001

2000
Tolerance to Multiple Transient Faults for Aperiodic Tasks in Hard Real-Time Systems.
IEEE Trans. Computers, 2000

An Incremental Approach to Scheduling during Overloads in Real-Time Systems.
Proceedings of the 21st IEEE Real-Time Systems Symposium (RTSS 2000), 2000

Scheduling optional computations in fault-tolerant real-time systems.
Proceedings of the 7th International Workshop on Real-Time Computing and Applications Symposium (RTCSA 2000), 2000

Effect of scheduling jitter on end-to-end delay in TDMA protocols.
Proceedings of the 7th International Workshop on Real-Time Computing and Applications Symposium (RTCSA 2000), 2000

Optimal scheduling of imprecise computation tasks in the presence of multiple faults.
Proceedings of the 7th International Workshop on Real-Time Computing and Applications Symposium (RTCSA 2000), 2000

Scheduling algorithms for dynamic message streams with distance constraints in TDMA protocol.
Proceedings of the 12th Euromicro Conference on Real-Time Systems (ECRTS 2000), 2000

Tolerating faults while maximizing reward.
Proceedings of the 12th Euromicro Conference on Real-Time Systems (ECRTS 2000), 2000

1999
Distributed Path Reservation Algorithms for Multiplexed All-Optical Interconnection Networks.
IEEE Trans. Computers, 1999

Fault-Tolerant RT-Mach (FT-RT-Mach) and an Application to Real-Time Train Control.
Softw. Pract. Exp., 1999

Distributed Control Protocols for Wavelength Reservation and their Performance Evaluation.
Photonic Netw. Commun., 1999

Modeling Communication Locality in Multiprocessors.
J. Parallel Distributed Comput., 1999

Incorporating Error Recovery into the Imprecise Computation Model.
Proceedings of the 6th International Workshop on Real-Time Computing and Applications Symposium (RTCSA '99), 1999

Implementation of a Transient-Fault-Tolerance Scheme on DEOS - A Technology Transfer from an Academic System to an Industrial System.
Proceedings of the Fifth IEEE Real-Time Technology and Applications Symposium, 1999

Compiler Analysis to Support Compiled Communication for HPF-Like Programs.
Proceedings of the 13th International Parallel Processing Symposium / 10th Symposium on Parallel and Distributed Processing (IPPS / SPDP '99), 1999

Pre-Allocating Control Bandwidth in an Optical Interconnection Network.
Proceedings of the International Conference on Parallel Processing 1999, 1999

Reducing Message Overhead in TMR Systems.
Proceedings of the 19th International Conference on Distributed Computing Systems, Austin, TX, USA, May 31, 1999

Fault tolerant real-time global scheduling on multiprocessors.
Proceedings of the 11th Euromicro Conference on Real-Time Systems (ECRTS 1999), 1999

1998
Realizing Common Communication Patterns in Partitioned Optical Passive Stars (POPS) Networks.
IEEE Trans. Computers, 1998

Fault-Tolerant Rate-Monotonic Scheduling.
Real Time Syst., 1998

Time Slot Allocation for Real-Time Messages with Negotiable Distance Constrains.
Proceedings of the Fourth IEEE Real-Time Technology and Applications Symposium, 1998

Distributed Dynamic Control of Circuit-Switched Banyan Networks.
Proceedings of the 12th International Parallel Processing Symposium / 9th Symposium on Parallel and Distributed Processing (IPPS/SPDP '98), March 30, 1998

An Efficient RMS Admission Control and Its Application to Multiprocessor Scheduling.
Proceedings of the 12th International Parallel Processing Symposium / 9th Symposium on Parallel and Distributed Processing (IPPS/SPDP '98), March 30, 1998

Performance of Multihop Communications Using Logical Topologies on Optical Torus Networks.
Proceedings of the International Conference On Computer Communications and Networks (ICCCN 1998), 1998

Comparison of global and partitioning schemes for scheduling rate monotonic tasks on a multiprocessor.
Proceedings of the 10th Euromicro Conference on Real-Time Systems (ECRTS 1998), 1998

1997
Reducing Communication Latency with Path Multiplexing in Optically Interconnected Multiprocessor Systems.
IEEE Trans. Parallel Distributed Syst., 1997

Fault-Tolerance Through Scheduling of Aperiodic Tasks in Hard Real-Time Multiprocessor Systems.
IEEE Trans. Parallel Distributed Syst., 1997

Demand-Driven Data Flow Analysis for Communication Optimization.
Parallel Process. Lett., 1997

Arbitrary Size Benes Networks.
Parallel Process. Lett., 1997

A Load Balancing Package on Distributed Memory Systems and its Application to Particle-Particle Particle-Mesh (P3M) Methods.
Parallel Comput., 1997

On-line error detection through data duplication in distributed-memory systems.
Microprocess. Microsystems, 1997

Does Time-Division Multiplexing Close the Gap between Memory and Optical Communication Speeds?
Proceedings of the Parallel Computer Routing and Communication, 1997

An Array Data Flow Analysis Based Communication Optimizer.
Proceedings of the Languages and Compilers for Parallel Computing, 1997

Modeling Compiled Communication Costs in Multiplexed Optical Networks.
Proceedings of the 11th International Parallel Processing Symposium (IPPS '97), 1997

1996
Loop Transformations for Fault Detection in Regular Loops on Massively Parallel Systems.
IEEE Trans. Parallel Distributed Syst., 1996

Compiled Communication for All-Optical TDM Networks.
Proceedings of the 1996 ACM/IEEE Conference on Supercomputing, 1996

A Timestamp-based Selective Invalidation Scheme for Multiprocessor Cache Coherence.
Proceedings of the 1996 International Conference on Parallel Processing, 1996

A Load Balancing Package for Domain Decomposition on Distributed Memory Systems.
Proceedings of the High-Performance Computing and Networking, 1996

1995
Optimal Reconfiguration Algorithms for Real-Time Fault-Tolerant Processor Arrays.
IEEE Trans. Parallel Distributed Syst., 1995

Routing in Modular Fault-Tolerant Multiprocessor Systems.
IEEE Trans. Parallel Distributed Syst., 1995

Reconfiguration in Fault-Tolerant 3D Meshes.
Parallel Process. Lett., 1995

Channel Multiplexing in Fault-Tolerant Modular Multiprocessors.
J. Parallel Distributed Comput., 1995

Enhancing Real-Time Schedules to Tolerate Transient Faults.
Proceedings of the 16th IEEE Real-Time Systems Symposium, 1995

The Partitioned Optical Passive Stars (POPS) topology.
Proceedings of IPPS '95, 1995

1994
Reconfiguration with Time Division Multiplexed MIN's for Multiprocessor.
IEEE Trans. Parallel Distributed Syst., 1994

Embedding Binary X-Trees and Pyramids in Processor Arrays with Spanning Buses.
IEEE Trans. Parallel Distributed Syst., 1994

Computational Arrays with Flexible Redundancy.
IEEE Trans. Computers, 1994

Optoelectronic buses for high-performance computing.
Proc. IEEE, 1994

A Uniform Framework for Dynamic Load Balancing Strategies in Distributed Processing Systems.
J. Parallel Distributed Comput., 1994

Dynamic Reconfiguration of Optically Interconnected Networks with Time-Division Multiplexing .
J. Parallel Distributed Comput., 1994

Fault-Tolerant Scheduling on a Hard Real-Time Multiprocessor System.
Proceedings of the 8th International Symposium on Parallel Processing, 1994

Analysis of a Fault-Tolerant Multiprocessor Scheduling Algorithm.
Proceedings of the Digest of Papers: FTCS/24, 1994

Reconfiguration in 3D Meshes.
Proceedings of the IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems, 1994

1993
Time-Division Optical Communications in Multiprocessor Arrays.
IEEE Trans. Computers, 1993

Optical Computing and Interconnection Systems - Guest Editors' Introduction.
J. Parallel Distributed Comput., 1993

Compilation Techiques for Optimizing Communication on Distributed-Memory Systems.
Proceedings of the 1993 International Conference on Parallel Processing, 1993

1992
Bi-Level Reconfigurations of Fault Tolerant Arrays.
IEEE Trans. Computers, 1992

A Distributed Algorithm for Embedding Trees in Hypercubes with Modifications for Run-Time Fault Tolerance.
J. Parallel Distributed Comput., 1992

1991
An Efficient Modular Spare Allocation Scheme and Its Application to Fault Tolerant Binary Hypercubes.
IEEE Trans. Parallel Distributed Syst., 1991

Pipelined Communications in Optically Interconnected Arrays.
J. Parallel Distributed Comput., 1991

Multicasting in Optical Bus Connected Processors Using Coincident Pulse Techniques.
Proceedings of the International Conference on Parallel Processing, 1991

Reconfiguration of Computational Arrays with Multiple Redundancy.
Proceedings of the International Conference on Parallel Processing, 1991

Channel Multiplexing in Modular Fault Tolerant Multiprocessors.
Proceedings of the International Conference on Parallel Processing, 1991

Meshes with flexible redundancy.
Proceedings of the Algorithms and Parallel VLSI Architectures II, 1991

Mapping FIR filtering on systolic rings.
Proceedings of the Application Specific Array Processors, 1991

1990
Embedding Rectangular Grids into Square Grids with Dilation Two.
IEEE Trans. Computers, 1990

Optical Bus Control for Distributed Multiprocessors.
J. Parallel Distributed Comput., 1990

Short Circuits in Buffered Multi-Stage Interconnection Networks.
Comput. J., 1990

Embedding pyramids in array processors with pipelined busses.
Proceedings of the Application Specific Array Processors, 1990

1989
A Systolic Accelerator for the Iterative Solution of Sparse Linear Systems.
IEEE Trans. Computers, 1989

Synthesis of systolic algorithm design.
Parallel Comput., 1989

Space Multiplexing of Waveguides in Optically Interconnected Multiprocessor Systems.
Comput. J., 1989

The Application of a Sequence Notation to the Design of Systolic Computations.
BIT, 1989

Bi-level reconfigurations of fault tolerant arrays in bi-modal computational environments.
Proceedings of the Nineteenth International Symposium on Fault-Tolerant Computing, 1989

A software tool for the automatic generation of memory traces for shared memory multiprocessor systems.
Proceedings of the Proceedings 22nd Annual Simulation Symposium (ANSS-22 1989), 1989

1988
Multicolor reordering of sparse matrices resulting from irregular grids.
ACM Trans. Math. Softw., 1988

Parallel solution of linear systems with striped sparse matrices.
Parallel Comput., 1988

Message Complexity of the Set Intersection Problem.
Inf. Process. Lett., 1988

1987
A Study of Data Interlock in Computational Networks for Sparse Matrix Multiplication.
IEEE Trans. Computers, 1987

Parallel Gauss-Jordan elimination for the solution of dense linear systems.
Parallel Comput., 1987

Using Coincident Optical Pulses for Parallel Memory Addressing.
Computer, 1987

Verification of a Class of Self-Timed Computational Networks.
BIT, 1987

Iterative Solution of Sparse Linear Systems on Systolic Arrays.
Proceedings of the International Conference on Parallel Processing, 1987

1986
Application of Data Driven Networks to Sparse Matrix Multiplication.
Proceedings of the International Conference on Parallel Processing, 1986

Synthesizing Non-Uniform Systolic Designs.
Proceedings of the International Conference on Parallel Processing, 1986

1985
Formal Analysis of a Systolic System for Finite Element Stiffness Matrices.
J. Comput. Syst. Sci., 1985

A Language for the Simulation of Systolic Architectures.
Proceedings of the 12th Annual Symposium on Computer Architecture, 1985

1984
A Mathematical Model for the Verification of Systolic Networks.
SIAM J. Comput., 1984

1982
A comparison of methods for determining turning points of nonlinear equations.
Computing, 1982


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