Jue-Hsien Chern

According to our database1, Jue-Hsien Chern authored at least 11 papers between 1987 and 2006.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2006
Tomorrow's analog: just dead or just different?
Proceedings of the 43rd Design Automation Conference, 2006

2005
Challenges of analog/mixed-signal SoC design and verification.
Proceedings of the 2005 International Symposium on Physical Design, 2005

1993
Algorithms for transient three-dimensional mixed-level circuit and device simulation.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1993

Design for reliability: the major challenge for VLSI.
Proc. IEEE, 1993

Efficient and Robust Path Tracing Algorithm for DC Convergence Problem.
Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993

An accurate grid local truncation error for device simulation.
Proceedings of the 1993 IEEE/ACM International Conference on Computer-Aided Design, 1993

1991
Transient Three-Dimensional Mixed-Level Circuit and Device Simulation: Algorithms and Applications.
Proceedings of the 1991 IEEE/ACM International Conference on Computer-Aided Design, 1991

1990
A Parallel Block-Diagonal Preconditioned Conjugate-Gradient Solution Algorithm for Circuit and Device Simulations.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 1990

1989
SIERRA: a 3-D device simulator for reliability modeling.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1989

PGS and PLUCGS-two new matrix solution techniques for general circuit simulation.
Proceedings of the 1989 IEEE International Conference on Computer-Aided Design, 1989

1987
A Predictor/CAD Model for Buried-Channel MOS Transistors.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1987


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