Robert W. Brodersen

Affiliations:
  • University of California, Berkeley, USA


According to our database1, Robert W. Brodersen authored at least 133 papers between 1979 and 2019.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Awards

IEEE Fellow

IEEE Fellow 1982, "For contributions to the development of integrated circuits for signal processing.".

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

Online presence:

On csauthors.net:

Bibliography

2019
Antenna Array Geometries for Directional Wireless Networks.
Proceedings of the 2019 IEEE Wireless Communications and Networking Conference, 2019

2018
Receiver Adaptive Beamforming and Interference of Indoor Environments in mmWave.
Proceedings of the 29th IEEE Annual International Symposium on Personal, 2018

2016
Localization as a feature of mmWave communication.
Proceedings of the 2016 International Wireless Communications and Mobile Computing Conference (IWCMC), 2016

2010
A 1 GS/s 6 Bit 6.7 mW Successive Approximation ADC Using Asynchronous Processing.
IEEE J. Solid State Circuits, 2010

2009
A 1 Gb/s Mixed-Signal Baseband Analog Front-End for a 60 GHz Wireless Receiver.
IEEE J. Solid State Circuits, 2009

A 1-GS/s 6-bit 6.7-mW ADC in 65-nm CMOS.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2009

2008
A unified hardware/software runtime environment for FPGA-based reconfigurable computers using BORPH.
ACM Trans. Embed. Comput. Syst., 2008

File system access from reconfigurable FPGA hardware processes in BORPH.
Proceedings of the FPL 2008, 2008

An integrated debugging environment for FPGA computing platforms.
Proceedings of the ACM/SIGDA 16th International Symposium on Field Programmable Gate Arrays, 2008

Runtime Filesystem Support for Reconfigurable FPGA Hardware Processes in BORPH.
Proceedings of the 16th IEEE International Symposium on Field-Programmable Custom Computing Machines, 2008

Background ADC calibration in digital domain.
Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008

2007
A Subsampling Radio Architecture for Ultrawideband Communications.
IEEE Trans. Signal Process., 2007

Power and Area Minimization for Multidimensional Signal Processing.
IEEE J. Solid State Circuits, 2007

Detect and avoid: an ultra-wideband/WiMAX coexistence mechanism [Topics in Radio Communications].
IEEE Commun. Mag., 2007

The antenna array pattern synthesis problem as a discrete convex optimization problem in the presense of errors.
Proceedings of the 9th International Symposium on Signal Processing and Its Applications, 2007

A Highly Integrated 60GHz CMOS Front-End Receiver.
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007

Addressing the Dynamic Range Problem in Cognitive Radios.
Proceedings of IEEE International Conference on Communications, 2007

Impact of Sampling Jitter on Mostly-Digital Architectures for UWB Bio-Medical Applications.
Proceedings of IEEE International Conference on Communications, 2007

ASIC Design and Verification in an FPGA Environment.
Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, 2007

2006
Impact of scattering on the capacity, diversity, and propagation range of multiple-antenna channels.
IEEE Trans. Inf. Theory, 2006

Design of a Sub-mW 960-MHz UWB CMOS LNA.
IEEE J. Solid State Circuits, 2006

A 6-bit 600-MS/s 5.3-mW Asynchronous ADC in 0.13-$\mu{\hbox{m}}$ CMOS.
IEEE J. Solid State Circuits, 2006

Circuit modeling methodology for UWB omnidirectional small antennas.
IEEE J. Sel. Areas Commun., 2006

Novel Radio Architectures for UWB, 60 GHz, and Cognitive Wireless Systems.
EURASIP J. Wirel. Commun. Netw., 2006

A 6b 600MS/s 5.3mW Asynchronous ADC in 0.13µm CMOS.
Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006

Cooperative Sensing among Cognitive Radios.
Proceedings of IEEE International Conference on Communications, 2006

Power and Area Efficient VLSI Architectures for Communication Signal Processing.
Proceedings of IEEE International Conference on Communications, 2006

Digital Complex Signal Processing Techniques for Impulse Radio.
Proceedings of the Global Telecommunications Conference, 2006. GLOBECOM '06, San Francisco, CA, USA, 27 November, 2006

Improving Usability of FPGA-Based Reconfigurable Computers Through Operating System Support.
Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), 2006

Tomorrow's analog: just dead or just different?
Proceedings of the 43rd Design Automation Conference, 2006

A unified hardware/software runtime environment for FPGA-based reconfigurable computers using BORPH.
Proceedings of the 4th International Conference on Hardware/Software Codesign and System Synthesis, 2006

A 60GHz Phased Array in CMOS.
Proceedings of the IEEE 2006 Custom Integrated Circuits Conference, 2006

2005
An ultra-wideband transceiver architecture for low power, low rate, wireless systems.
IEEE Trans. Veh. Technol., 2005

Degrees of freedom in multiple-antenna channels: a signal space approach.
IEEE Trans. Inf. Theory, 2005

Millimeter-wave CMOS design.
IEEE J. Solid State Circuits, 2005

A Subsampling UWB Impulse Radio Architecture Utilizing Analytic Signaling.
IEICE Trans. Electron., 2005

BEE2: A High-End Reconfigurable Computing System.
IEEE Des. Test Comput., 2005

Physical layer design issues unique to cognitive radio systems.
Proceedings of the IEEE 16th International Symposium on Personal, 2005

The Design And Application Of A High-End Reconfigurable Computing System.
Proceedings of The 2005 International Conference on Engineering of Reconfigurable Systems and Algorithms, 2005

Future wireless systems: UWB, 60GHz, and cognitive radios.
Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005

An integrated debugging environment for reprogrammble hardware systems.
Proceedings of the Sixth International Workshop on Automated Debugging, 2005

2004
Methods for true energy-performance optimization.
IEEE J. Solid State Circuits, 2004

Design considerations for 60 GHz CMOS radios.
IEEE Commun. Mag., 2004

A perturbation theory on statistical quantization effects in fixed-point DSP with non-stationary inputs.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

Millimeter-wave CMOS device modeling and simulation.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

Floating-point to fixed-point conversion with decision errors due to quantization.
Proceedings of the 2004 IEEE International Conference on Acoustics, 2004

A subsampling UWB radio architecture by analytic signaling.
Proceedings of the 2004 IEEE International Conference on Acoustics, 2004

Describing MIMO designs for rapid prototyping in the BEE environment.
Proceedings of the 2004 12th European Signal Processing Conference, 2004

Automated design of operational transconductance amplifiers using reversed geometric programming.
Proceedings of the 41th Design Automation Conference, 2004

Automated fixed-point data-type optimization tool for signal processing and communication systems.
Proceedings of the 41th Design Automation Conference, 2004

2003
An adaptive multiantenna transceiver for slowly flat fading channels.
IEEE Trans. Commun., 2003

Designing BEE: A Hardware Emulation Engine for Signal Processing in Low-Power Wireless Applications.
EURASIP J. Adv. Signal Process., 2003

Rapid Design and Analysis of Communication Systems Using the BEE Hardware Emulation Environment.
Proceedings of the 14th IEEE International Workshop on Rapid System Prototyping (RSP 2003), 2003

Synchronization schemes for packet OFDM system.
Proceedings of IEEE International Conference on Communications, 2003

An automated floating-point to fixed-point conversion methodology.
Proceedings of the 2003 IEEE International Conference on Acoustics, 2003

The signal dimensions in multiple-antenna channels.
Proceedings of the Global Telecommunications Conference, 2003

Implementation of BEE: a real-time large-scale hardware emulation engine.
Proceedings of the ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2003

An equation-based method for phase noise analysis [oscillator examples].
Proceedings of the IEEE Custom Integrated Circuits Conference, 2003

2002
A design environment for high-throughput low-power dedicated signal processing systems.
IEEE J. Solid State Circuits, 2002

Wireless Systems-on-a-Chip Design.
Proceedings of the 3rd International Symposium on Quality of Electronic Design, 2002

Methods for true power minimization.
Proceedings of the 2002 IEEE/ACM International Conference on Computer-aided Design, 2002

Interpolation-based maximum likelihood channel estimation using OFDM pilot symbols.
Proceedings of the Global Telecommunications Conference, 2002

Nanometer design: what hurts next...?
Proceedings of the 39th Design Automation Conference, 2002

Energy efficient microprocessor design.
Kluwer, ISBN: 978-0-7923-7586-9, 2002

2001
Analysis and design of low-energy flip-flops.
Proceedings of the 2001 International Symposium on Low Power Electronics and Design, 2001

A design environment for high throughput, low power dedicated signal processing systems.
Proceedings of the IEEE 2001 Custom Integrated Circuits Conference, 2001

2000
A dynamic voltage scaled microprocessor system.
IEEE J. Solid State Circuits, 2000

Voltage scheduling in the IpARM microprocessor system.
Proceedings of the 2000 International Symposium on Low Power Electronics and Design, 2000

Design issues for dynamic voltage scaling.
Proceedings of the 2000 International Symposium on Low Power Electronics and Design, 2000

1999
InfoPad - past, present and future.
ACM SIGMOBILE Mob. Comput. Commun. Rev., 1999

Integrating power control, error correction coding, and scheduling for a CDMA downlink system.
IEEE J. Sel. Areas Commun., 1999

Trade-offs of performance and single chip implementation of indoor wireless multi-access receivers.
Proceedings of the 1999 IEEE Wireless Communications and Networking Conference, 1999

Globally Progressive Interactive Web Delivery.
Proceedings of the Proceedings IEEE INFOCOM '99, 1999

System-on-a-Chip VLSI - Is It Finally Really Here?
Proceedings of the 18th Conference on Advanced Research in VLSI (ARVLSI '99), 1999

1998
The InfoPad Multimedia Terminal: A Portable Device for Wireless Information Access.
IEEE Trans. Computers, 1998

VLSI design and implementation fuels the signal-processing revolution.
IEEE Signal Process. Mag., 1998

Invited Address: The InfoPad Project: Review and Lessons Learned.
Proceedings of the 11th International Conference on VLSI Design (VLSI Design 1991), 1998

The simulation and evaluation of dynamic voltage scaling algorithms.
Proceedings of the 1998 International Symposium on Low Power Electronics and Design, 1998

A Lossless 2-D Image Compression Technique for Synthetic Discrete-Tone Images.
Proceedings of the Data Compression Conference, 1998

1997
Unified power control, error correction coding and scheduling for aCDMA downlink system.
Wirel. Networks, 1997

InfoPad - An Experiment in System Level Design and Integration.
Proceedings of the 34st Conference on Design Automation, 1997

1996
A low-power, lightweight unit to provide ubiquitous information access application and network support for InfoPad.
IEEE Wirel. Commun., 1996

Guest editors' introduction.
J. VLSI Signal Process., 1996

Processor design for portable systems.
J. VLSI Signal Process., 1996

Predictive system shutdown and other architectural techniques for energy efficient programmable computation.
IEEE Trans. Very Large Scale Integr. Syst., 1996

VLSI in Mobile Communication.
Proceedings of the 9th International Conference on VLSI Design (VLSI Design 1996), 1996

Unified Power Control, Error Correction Coding and Scheduling for a CDMA Downlink System.
Proceedings of the Proceedings IEEE INFOCOM '96, 1996

1995
System level hardware module generation.
IEEE Trans. Very Large Scale Integr. Syst., 1995

A design system for on-chip oversampling A/D interfaces.
IEEE Trans. Very Large Scale Integr. Syst., 1995

SIERA: a unified framework for rapid-prototyping of system-level hardware and software.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1995

Optimizing power using transformations.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1995

Minimizing power consumption in digital CMOS circuits.
Proc. IEEE, 1995

Energy efficient CMOS microprocessor design.
Proceedings of the 28th Annual Hawaii International Conference on System Sciences (HICSS-28), 1995

The InfoPad User Interface.
Proceedings of the COMPCON '95: Technologies for the Information Superhighway, 1995

Design of Wireless Portable Systems.
Proceedings of the COMPCON '95: Technologies for the Information Superhighway, 1995

A prototype user interface for a mobile multimedia terminal.
Proceedings of the Human Factors in Computing Systems, 1995

1994
A low-power chipset for a portable multimedia I/O terminal.
IEEE J. Solid State Circuits, December, 1994

Editorial.
Wirel. Pers. Commun., 1994

Integrated Test Solutions for a System Design Environment.
VLSI Design, 1994

Energy Efficient Programmable Computation.
Proceedings of the Seventh International Conference on VLSI Design, 1994

Research challenges in wireless multimedia.
Proceedings of the 5th IEEE International Symposium on Personal, 1994

1992
Using VHDL for High-Level, Mixed-Mode System Simulation.
IEEE Des. Test Comput., 1992

A portable multimedia terminal.
IEEE Commun. Mag., 1992

Low Power Techniques for Portable Real-time DSP Applications.
Proceedings of the Fifth International Conference on VLSI Design, 1992

An Architecture for a Reconfigurable IEEE 1149.n Master Controller Board.
Proceedings of the Proceedings IEEE International Test Conference 1992, 1992

Design and Implementation of a Robot Control System Using a Unified Hardware-Software Rapid Prototyping Framework.
Proceedings of the Proceedings 1992 IEEE International Conference on Computer Design: VLSI in Computer & Processors, 1992

Design of system interface modules.
Proceedings of the 1992 IEEE/ACM International Conference on Computer-Aided Design, 1992

HYPER-LP: a system for power minimization using architectural transformations.
Proceedings of the 1992 IEEE/ACM International Conference on Computer-Aided Design, 1992

1991
Asynchronous design for programmable digital signal processors.
IEEE Trans. Signal Process., 1991

An integrated CAD system for algorithm-specific IC design.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1991

Hardware and software prototyping for application-specific real-time systems.
Proceedings of the Second International Workshop on Rapid System Prototyping, 1991

Rapid-Prototyping of Hardware and Software in a Unified Framework.
Proceedings of the 1991 IEEE/ACM International Conference on Computer-Aided Design, 1991

A test controller board for TSS.
Proceedings of the First Great Lakes Symposium on VLSI, 1991

Computer vision hardware using the Radon transform.
Proceedings of the IEEE Computer Society Conference on Computer Vision and Pattern Recognition, 1991

1990
A clock-free chip set for high-sampling rate adaptive filters.
J. VLSI Signal Process., 1990

Hardware for Hidden Markov-Model-Based, Large-Vocabulary Real-Time Speech Recognition.
Proceedings of the Speech and Natural Language: Proceedings of a Workshop Held at Hidden Valley, 1990

1989
Automatic synthesis of asynchronous circuits from high-level specifications.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1989

A large-vocabulary real-time continuous-speech recognition system.
Proceedings of the IEEE International Conference on Acoustics, 1989

Design of clock-free asynchronous systems for real-time signal processing.
Proceedings of the IEEE International Conference on Acoustics, 1989

1988
An image-recognition system using algorithmically dedicated integrated circuits.
Mach. Vis. Appl., 1988

Asynchronous processor design for digital signal processing.
Proceedings of the IEEE International Conference on Acoustics, 1988

Monolithic decimation filtering for custom delta-sigma A/D converters.
Proceedings of the IEEE International Conference on Acoustics, 1988

Automatic generation of a custom digital signal processor for an adaptive robot arm controller.
Proceedings of the IEEE International Conference on Acoustics, 1988

1987
A parameterized VLSI video-rate histogram processor.
Proceedings of the IEEE International Conference on Acoustics, 1987

1986
An integrated-circuit-based speech recognition system.
IEEE Trans. Acoust. Speech Signal Process., 1986

Computer Generation of Digital Filter Banks.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1986

A custom chip set for real-time image processing.
Proceedings of the IEEE International Conference on Acoustics, 1986

Experiences with automatic generation of audio band digital signal processing circuits.
Proceedings of the IEEE International Conference on Acoustics, 1986

1985
An Integrated Automated Layout Generation System for DSP Circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1985

1984
A dynamic time warp IC for a one thousand word recognition system.
Proceedings of the IEEE International Conference on Acoustics, 1984

A multirate root LPC speech synthesizer.
Proceedings of the IEEE International Conference on Acoustics, 1984

1983
Implications of VLSI technology for speech processing.
Proceedings of the American Federation of Information Processing Societies: 1983 National Computer Conference, 1983

1979
Pitch extraction using MOS-LSI circuitry.
Proceedings of the IEEE International Conference on Acoustics, 1979


  Loading...