Junichi Hinata

According to our database, Junichi Hinata authored at least 2 papers between 1989 and 1993.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

1993

A 1.71-million transistor CMOS CPU chip with a testable cache architecture.

Yuichi Saito, Yukihiko Shimazu, Tom Shimizu, Kenji Shirai, Isao Fujioka, Yoshitetsu Nishiwaki, Junichi Hinata, Yoshiki Shimotsuma, Masayoshi Sakao

IEEE J. Solid State Circuits, November, 1993

1989

A 32-bit microprocessor with high performance bit-map manipulation instructions.

Toru Shimizu, Shunichi Iwata, Yuichi Saito, Toyohiko Yoshida, Masahito Matsuo, Junichi Hinata, Kazunori Saito

Proceedings of the Computer Design: VLSI in Computers and Processors, 1989