Junwei Hou

Orcid: 0000-0002-6860-2863

According to our database1, Junwei Hou authored at least 12 papers between 1996 and 2023.

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Bibliography

2023
PosNet: Estimating lettuce fresh weight in plant factory based on oblique image.
Comput. Electron. Agric., October, 2023

2021
Fabrication and Performance of Graphene Flexible Pressure Sensor with Micro/Nano Structure.
Sensors, 2021

2003
Concurrent transient fault simulation for analog circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2003

2000
Analog Transient Concurrent Fault Simulation with Dynamic Fault Grouping.
Proceedings of the IEEE International Conference On Computer Design: VLSI In Computers & Processors, 2000

1999
Fault Detection and Automated Fault Diagnosis for Embedded Integrated Electrical Passives.
J. VLSI Signal Process., 1999

Efficient Test Generation for Transient Testing of Analog Circuits Using Partial Numerical Simulation.
Proceedings of the 17th IEEE VLSI Test Symposium (VTS '99), 1999

Test Generation for Analog Circuits Using Partial Numerical Simulation.
Proceedings of the 12th International Conference on VLSI Design (VLSI Design 1999), 1999

A novel concurrent fault simulation method for mixed-signal circuits.
Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999

1998
Fault detection and automated fault diagnosis for embedded integrated electrical passives.
Proceedings of the International Conference on Computer Design: VLSI in Computers and Processors, 1998

CONCERT: a concurrent transient fault simulator for nonlinear analog circuits.
Proceedings of the 1998 IEEE/ACM International Conference on Computer-Aided Design, 1998

1997
Hierarchical Specification-Driven Analog Fault Modeling for Efficient Fault Simulation and Diagnosis.
Proceedings of the Proceedings IEEE International Test Conference 1997, 1997

1996
Process Partitioning for Distributed Embedded Systems.
Proceedings of the Forth International Workshop on Hardware/Software Codesign, 1996


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